参数资料
| 型号： | LT3692IUH#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/36页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3.5A DL 32QFN |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 34.2 V |
| 输入电压： | 3.6 V ~ 36 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 110kHz ~ 2.5MHz |
| 电流 - 输出： | 3.5A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
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LT3692
APPLICATIONS INFORMATION
Table 2. Efficiency and Size Comparisons for Different R RT/SYNC Values, 3.3V Output
FREQUENCY
250kHz
500kHz
1000kHz
1500kHz
2250kHz
RT/SYNC
5.90kΩ
13.0kΩ
28.0kΩ
44.2kΩ
71.5kΩ
EFFICIENCY
V VIN1/2 = 12V
77.8%
81.2%
80.5%
79.3%
76.7%
V IN(MAX)?
38V
31V
16V
10V
6.5V
L*
12μH
6.8μH
3.3μH
1.5μH
0.82μH
C*
120μF
60μF
30μF
22μF
15μF
C + L (Area)
59.8mm 2
54.6mm 2
51.9mm 2
46.9mm 2
19.1mm 2
? V IN(MAX) is defined as the highest input voltage that maintains constant output voltage ripple.
*Inductor and capacitor values chosen for stability and constant ripple current.
Max Frequency =
3.3 + 0.6 1
25 – 0.4 + 0.6 250e-9
DC MAX =
1 +
V OUT + V D
V IN(MIN) = – V D + V SW
Example.
V IN = 25V, V OUT = 3.3V, I OUT = 2.5A, t ON(MIN) = 250ns,
V D = 0.6V, V SW = 0.4V:
? ~ 600kHz
RT/SYNC ~ 15.8kΩ (Figure 2 )
Input Voltage Range
Once the switching frequency has been determined, the
input voltage range of the regulator can be determined. The
minimum input voltage is determined by either the LT3692’s
minimum operating voltage of ~2.8V, or by its maximum
duty cycle. The duty cycle is the fraction of time that the
internal switch is on during a clock cycle. Unlike most
fixed frequency regulators, the LT3692 will not switch off
at the end of each clock cycle if there is sufficient voltage
across the boost capacitor (C3 in Figure 1) to fully satu-
rate the output switch. Forcing switch off for a minimum
time will only occur at the end of a clock cycle when the
boost capacitor needs to be recharged. This operation
has the same effect as lowering the clock frequency for a
fixed off time, resulting in a higher duty cycle and lower
minimum input voltage. The resultant duty cycle depends
on the charging times of the boost capacitor and can be
approximated by the following equation:
1
1
B
where B is 3A divided by the typical boost current from
the Electrical Characteristics table.
This leads to a minimum input voltage of:
DC MAX
where V SW is the voltage drop of the internal switch.
Figure 4 shows a typical graph of minimum input voltage
vs load current for Figure 19, the 3.3V and 1.8V application.
6
V OUT = 3.3V
SW1
t P
5
4
START-UP
RUNNING
SW2
t P /2
t P
3
2
t P /2
t P
1
CLKOUT
0
0
500 1000 1500 2000 2500 3000 3500
t DCLKOSW1
t DCLKOSW2
3692 F03
CURRENT (mA)
3692 F04
Figure 3. Timing Diagram RT/SYNC = 28.0k, t P = 1μs, V DIV = 0V
Figure 4. Minimum Input Voltage vs Load Current
13
For more information www.linear.com/3692
3692fa
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| LT36931DD#PBF | 制造商:Linear Technology 功能描述: |
| LT3693EDD#PBF | 功能描述:IC REG BUCK ADJ 3.5A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
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