参数资料
| 型号： | LT3692IUH#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/36页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3.5A DL 32QFN |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 34.2 V |
| 输入电压： | 3.6 V ~ 36 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 110kHz ~ 2.5MHz |
| 电流 - 输出： | 3.5A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
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LT3692
PIN FUNCTIONS
BST1/2: The BST pin provides a higher than V IN base
drive to the power NPN to ensure a low switch drop. If the
voltage between the BST pin and the V IN pin is less than
the voltage required to fully turn on the power NPN, the
power switch is turned off to recharge the BST capacitor.
CMPI1/2: The CMPI pin is an input to a comparator with a
threshold of 720mV and 60mv of hysteresis. Connecting
the CMPI pin to the FB pin will generate a power good
signal when the output is within 90% of its regulated value.
CMPO1/2: The CMPO pin is an open-collector output that
sinks current when the CMPI pin falls below its threshold.
For a typical input voltage above 2.8V, its output state re-
mains true, although during shutdown, V IN1 undervoltage
lockout or thermal shutdown, its current sink capability is
reduced. The COMPO pins can be left open circuit or tied
together to form a single power good signal.
DIV: The voltage present at the DIV pin determines the ratio
of channel 1 frequency to the master clock frequency set
by the RT/SYNC pin. The DIV pin is driven by an internal
current source with a typical value of 12μA which allows
a single resistor from the DIV pin to ground to set the
DIV voltage and resulting channel 1 frequency divider.
Ratios of 1, 2, 4 and 8 are available. See the Applications
Information section for more information.
DNC: Do Not Connect.
GND: The exposed pad pin is the only ground connec-
tion for the device. The exposed pad should be soldered
to a large copper area to reduce thermal resistance. The
GND pin is common to both channels and also serves as
small-signal ground. For ideal operation all small-signal
ground paths should connect to the GND pin at a single
point avoiding any high current ground returns.
FB1/2: The FB pin is the negative input to the error amplifier.
The output switches to regulate this pin to 806mV with
respect to the exposed ground pad. Bias current flows
out of the FB pin.
ILIM1/2: The voltage present at the ILIM pin determines
the peak inductor current for the channel. The ILIM pin is
driven by an internal current source with a typical value
of 12μA. A resistor from the ILIM pin to ground sets the
ILIM voltage. The maximum current limit range is 4.8A to
2A when the ILIM voltages are 1.5V and 0V respectively.
IND1/2: The IND pin is the input to the internal sense resistor
that measures current flowing in the inductor. When the
current in the resistor exceeds the current dictated by the
V C pin, the SW latch is held in reset, disabling the output
switch. Bias current flows out of the IND pin.
RT/SYNC: The voltage present at the RT/SYNC pin deter-
mines the constant switching frequency. The RT/SYNC
pin is driven by an internal current source with a typical
value of 12μA which allows a single resistor from the RT/
SYNC pin to ground to set the RT/SYNC voltage and result-
ing switching frequency. Minimum switching frequency
is typically 110kHz when V RT/SYNC is 0V and maximum
switching frequency is typically 2.5MHz when V RT/SYNC
is above 950mV.
Driving the RT/SYNC pin with an external clock signal will
synchronize the switch to the applied frequency. Synchro-
nization occurs on the rising edge of the clock signal after
the clock signal is detected. Each rising clock edge initiates
an oscillator ramp reset. A gain control loop servos the
oscillator charging current to maintain constant oscillator
amplitude. Hence, the slope compensation and channel
phase relationship remain unchanged. If the clock signal
is removed, the oscillator reverts to resistor mode after
the synchronization detection circuitry times out. The clock
source impedance should be set such that the current out
of the RT/SYNC pin in resistor mode generates a frequency
roughly equivalent to the synchronization frequency. See
the Applications Information section for more information.
8
For more information www.linear.com/3692
3692fa
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LT3693 | 制造商:LINER 制造商全称:Linear Technology 功能描述:Monolithic Dual Tracking |
| LT36931DD#PBF | 制造商:Linear Technology 功能描述: |
| LT3693EDD#PBF | 功能描述:IC REG BUCK ADJ 3.5A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| LT3693EDD#TRPBF | 功能描述:IC REG BUCK ADJ 3.5A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
| LT3693EDDPBF | 制造商:Linear Technology 功能描述:DC-DC Converter Step-Down 3.6-36V DFN10 |
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