参数资料
型号: LT3804EFE
厂商: Linear Technology
文件页数: 5/16页
文件大小: 0K
描述: IC REG CTRLR ISO PWM 28-TSSOP
标准包装: 50
PWM 型: 电流/电压模式
输出数: 2
频率 - 最大: 570kHz
占空比: 80%
电源电压: 8 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
包装: 管件
LT3804
PI FU CTIO S
CL1P (Pin 1): Current Limit Amplifier CA1 Positive Input.
CA1 drives optocoupler when the first output is in current
limit.The threshold is set at 50mV.
CL1N (Pin 2): Current Limit Amplifier CA1 Negative Input.
When used, CL1N is connected to the output, and CL1P is
connected to the other end of the output current sense
resistor.
I LCOMP2 (Pin 3): Current Limit Amplifier CA2 Compensa-
tion Node. At second output current limit, CA2 pulls down
on this pin to regulate output current.
BOOST (Pin 4): Topside (Boosted) Driver Supply.This pin
is used to bootstrap and supply the topside power switch
gate drive circuitry. In normal operation V BOOST is powered
from the internally generated 8V GBIAS; V BOOST = V SW + 8V
when TGATE is on.
TGATE (Pin 5): Topside (Boosted) N-Channel MOSFET
Driver. When TGATE is on, the voltage is equal to V SW + 6V.
SW (Pin 6): Switch Node Connection to Inductor.
CSET (Pin 7): Oscillator Frequency Setting Pin.The capaci-
tor from this pin to ground sets the PWM switching
frequency.
SYNC (Pin 8): Synchronization Input. This pin should be
connected to the secondary side output of the power
transformer with a series resistor. A filtering capacitor of
10pf is recommended.
SS2 (Pin 9): Soft-Start for the Second Output. A capacitor
on this pin sets the output ramp-up rate. The typical time
for SS2 to reach the programmed level is: (C ? 0.6V)/10 μ A.
PGIN1 (Pin 10): First Output Power Good Input.The volt-
age setting resistor divider should be connected to GNDS1
if remote sensing is used.
PGIN2 (Pin 11): Second Output Power Good Input. The
voltage setting resistor divider should be connected to
GNDS2 if remote sensing is used.
GNDS2 (Pin 12): Second Output Remote Ground Sensing.
GNDS1 (Pin 13): First Output Remote Ground Sensing.
V FB2 (Pin 14): Voltage Amplifier V A2 Inverting Input. A
resistor divider to this pin sets the second output voltage.
The reference voltage at this pin is V REF2 (0.6V referred to
remote sensing ground GNDS2).
BGS (Pin 16): Bottom Gate Switching Control. CA2 moni-
tors the inductor current and prohibits BGATE from turn-
ing on when the inductor current is low (below 8mV across
the current sense resistor R S2 ) allowing discontinous
mode operation and avoiding reverse inductor current.
Grounding BGS disables this function, so that the PWM is
always in continuous mode except during start-up.
SS1 (Pin 17): Soft-Start for the First Output. A capacitor on
this pin sets the output ramp-up rate. The typical time for
SS1 to reach the programmed level is: (C ? 0.6V)/10 μ A.
V FB1 (Pin 18): Voltage Amplifier V A1 Inverting Input. A
resistor divider to this pin sets the first output voltage. The
reference voltage at this pin is V REF1 (0.6V referred to
remote sensing ground GNDS1).
PGOOD (Pin 19): Power Good. PGOOD goes high to
indicate power good only when both PGIN1 and PGIN2
sense power good. A pull up resistor is required on this pin
if the power good function is used.
CL2P (Pin 20): Second 0utput Current Limit Amplifier
CA2 Positive Input.The threshold is set at 50mV.
CL2N (Pin 21): Current Limit Amplifier CA2 Negative
Input. When used, CL2N is connected to the output
capacitor, and CL2P is connected to the other end of the
output current sense resistor.
V AOUT1 (Pin 22): Voltage Amplifier VA1 Output.
OPTO (Pin 23): Optocoupler Driver. A resistor to the opto
diode is required to set the optocoupler bias current.
Maximum sourcing current is 10mA at 5V.
PGND (Pin 24): Ground of the Bottom Side N-Channel
MOSFET Driver.
V CC (Pin 25): Supply of the Chip. A low ESR capacitor is
required to bypass the supply.
BGATE (Pin 26): Bottom Side N-Channel MOSFET Driver.
GBIAS (Pin 27): 8V Regulator Output for Boostrapping
V BOOST . A bypass capacitor of at least 2 μ F is needed.
I LCOMP1 (Pin 28): Current Limit Amplifier CA1 Compensa-
tion Node . When the first output is in current limit, CA1
pulls down V AOUT1 pin to regulate the first output current.
Exposed Pad (Pin 29): Signal Ground. Must be electrically
connected on PCB.
V AOUT2 (Pin 15): Voltage Amplifier V A2 Output.
3804i
5
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