参数资料
型号: LT3957EUHE#PBF
厂商: Linear Technology
文件页数: 11/28页
文件大小: 0K
描述: IC REG MULTI CONFIG ADJ 36VQFN
特色产品: LT?3957/LT?3958 Converters
标准包装: 61
类型: 升压(升压),反相,回扫,Sepic
输出类型: 可调式
输出数: 1
输出电压: 1.6 V ~ 40 V
输入电压: 3 V ~ 40 V
PWM 型: 电流模式
频率 - 开关: 100kHz ~ 1MHz
电流 - 输出: 5A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 36-WFQFN 裸露焊盘
包装: 管件
供应商设备封装: 36-QFN-EP(6x5)
LT3957
APPLICATIONS INFORMATION
Operating Frequency and Synchronization
The choice of operating frequency may be determined by
on-chip power dissipation (a low switching frequency may
be required to ensure IC junction temperature does not
exceed 125°C), otherwise it is a trade-off between ef?ciency
and component size. Low frequency operation improves
ef?ciency by reducing gate drive current and MOSFET
and diode switching losses. However, lower frequency
operation requires a physically larger inductor. Switching
frequency also has implications for loop compensation.
The LT3957 uses a constant-frequency architecture that
can be programmed over a 100kHz to 1000kHz range
with a single external resistor from the RT pin to SGND,
as shown in Figure 1. A table for selecting the value of R T
for a given operating frequency is shown in Table 1.
Table 1. Timing Resistor (R T ) Value
Duty Cycle Consideration
Switching duty cycle is a key variable de?ning con-
verter operation. As such, its limits must be considered.
Minimum on-time is the smallest time duration that the
LT3957 is capable of turning on the power MOSFET. This
time is typically about 240ns (see Minimum On-Time in
the Electrical Characteristics table). In each switching
cycle, the LT3957 keeps the power switch off for at least
220ns (typical) (see Minimum Off-Time in the Electrical
Characteristics table).
The minimum on-time, minimum off-time and the switching
frequency de?ne the minimum and maximum switching
duty cycles a converter is able to generate:
Minimum duty cycle = minimum on-time ? frequency
Maximum duty cycle = 1 – (minimum off-time ? frequency)
SWITCHING FREQUENCY (kHz)
100
200
300
400
R T (kΩ)
140
63.4
41.2
30.9
Programming the Output Voltage
The output voltage V OUT is set by a resistor divider, as
shown in Figure 1. The positive and negative V OUT are set
by the following equations:
V OUT,POSITIVE = 1.6V ? ? 1 +
R2 ?
R1 ?
500
600
24.3
19.6
?
?
?
V OUT,NEGATIVE = –0.8V ? ? 1 +
R2 ?
R1 ?
700
800
900
16.5
14
12.1
?
?
?
1000
10.5
The resistors R1 and R2 are typically chosen so that
the error caused by the current ?owing into the FBX pin
The operating frequency of the LT3957 can be synchronized
to an external clock source. By providing a digital clock
during normal operation is less than 1% (this translates
to a maximum value of R1 at about 158k).
signal into the SYNC pin, the LT3957 will operate at the
SYNC clock frequency. The LT3957 detects the rising edge
of each clock cycle. If this feature is used, an R T resistor
should be chosen to program a switching frequency 20%
slower than SYNC pulse frequency. It is recommended that
the SYNC pin has a minimum pulse width of 200ns. Tie
the SYNC pin to SGND if this feature is not used.
3957f
11
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