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| 型号： | LT3957EUHE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/28页 |
| 文件大小： | 0K |
| 描述： | IC REG MULTI CONFIG ADJ 36VQFN |
| 特色产品： | LT?3957/LT?3958 Converters |
| 标准包装： | 61 |
| 类型： | 升压（升压），反相，回扫，Sepic |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.6 V ~ 40 V |
| 输入电压： | 3 V ~ 40 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 100kHz ~ 1MHz |
| 电流 - 输出： | 5A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 36-QFN-EP（6x5） |
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LT3957
APPLICATIONS INFORMATION
V VIN,FALLING = 1.22 ?
Main Control Loop
The LT3957 uses a ?xed frequency, current mode control
scheme to provide excellent line and load regulation. Op-
eration can be best understood by referring to the Block
Diagram in Figure 1.
The start of each oscillator cycle sets the SR latch (SR1)
and turns on the internal power MOSFET switch M1 through
driver G2. The switch current ?ows through the internal
current sensing resistor R SENSE and generates a voltage
proportional to the switch current. This current sense
voltage V ISENSE (ampli?ed by A5) is added to a stabilizing
slope compensation ramp and the resulting sum (SLOPE)
is fed into the positive terminal of the PWM comparator A7.
When SLOPE exceeds the level at the negative input of A7
(VC pin), SR1 is reset, turning off the power switch. The
level at the negative input of A7 is set by the error ampli?er
A1 (or A2) and is an ampli?ed version of the difference
between the feedback voltage (FBX pin) and the reference
voltage (1.6V or –0.8V, depending on the con?guration).
In this manner, the error ampli?er sets the correct peak
switch current level to keep the output in regulation.
The LT3957 has a switch current limit function. The current
sense voltage is input to the current limit comparator A6.
If the SENSE2 pin voltage is higher than the sense current
limit threshold V SENSE(MAX) (48mV, typical), A6 will reset
SR1 and turn off M1 immediately.
The LT3957 is capable of generating either positive or
negative output voltage with a single FBX pin. It can be
con?gured as a boost, ?yback or SEPIC converter to gen-
erate positive output voltage, or as an inverting converter
to generate negative output voltage. When con?gured as
a SEPIC converter, as shown in Figure 1, the FBX pin is
pulled up to the internal bias voltage of 1.6V by a volt-
age divider (R1 and R2) connected from V OUT to SGND.
Comparator A2 becomes inactive and comparator A1
performs the inverting ampli?cation from FBX to VC.
When the LT3957 is in an inverting con?guration, the
The LT3957 has overvoltage protection functions to
protect the converter from excessive output voltage
overshoot during start-up or recovery from a short-circuit
condition. An overvoltage comparator A11 (with 20mV
hysteresis) senses when the FBX pin voltage exceeds the
positive regulated voltage (1.6V) by 8% and provides a
reset pulse. Similarly, an overvoltage comparator A12
(with 10mV hysteresis) senses when the FBX pin voltage
exceeds the negative regulated voltage (–0.8V) by 11%
and provides a reset pulse. Both reset pulses are sent to
the main RS latch (SR1) through G6 and G5. The power
MOSFET switch M1 is actively held off for the duration of
an output overvoltage condition.
Programming Turn-On and Turn-Off Thresholds with
the EN/UVLO Pin
The EN/UVLO pin controls whether the LT3957 is enabled
or is in shutdown state. A micropower 1.22V reference,
a comparator A10 and a controllable current source I S1
allow the user to accurately program the supply voltage
at which the IC turns on and off. The falling value can be
accurately set by the resistor dividers R3 and R4. When
EN/UVLO is above 0.4V, and below the 1.22V threshold,
the small pull-down current source I S1 (typical 2μA) is
active.
The purpose of this current is to allow the user to program
the rising hysteresis. The Block Diagram of the comparator
and the external resistors is shown in Figure 1. The typical
falling threshold voltage and rising threshold voltage can
be calculated by the following equations:
(R3 + R4)
R4
V VIN,RISING = 2μA ? R3 + V IN,FALLING
For applications where the EN/UVLO pin is only used as
a logic input, the EN/UVLO pin can be connected directly
to the input voltage V IN for always-on operation.
FBX pin is pulled down to –0.8V by a voltage divider
connected from V OUT to SGND. Comparator A1 becomes
inactive and comparator A2 performs the noninverting
ampli?cation from FBX to VC.
3957f
9
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LT3957EUHETRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Boost, Flyback, SEPIC and Inverting Converter with 5A, 40V Switch |
| LT3957IUHE#PBF | 功能描述:IC REG MULTI CONFIG ADJ 36VQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LT3957IUHE#TRPBF | 功能描述:IC REG MULTI CONFIG ADJ 36VQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LT3957IUHEPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Boost, Flyback, SEPIC and Inverting Converter with 5A, 40V Switch |
| LT3957IUHETRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Boost, Flyback, SEPIC and Inverting Converter with 5A, 40V Switch |
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