参数资料
型号: LT3957EUHE#PBF
厂商: Linear Technology
文件页数: 12/28页
文件大小: 0K
描述: IC REG MULTI CONFIG ADJ 36VQFN
特色产品: LT?3957/LT?3958 Converters
标准包装: 61
类型: 升压(升压),反相,回扫,Sepic
输出类型: 可调式
输出数: 1
输出电压: 1.6 V ~ 40 V
输入电压: 3 V ~ 40 V
PWM 型: 电流模式
频率 - 开关: 100kHz ~ 1MHz
电流 - 输出: 5A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 36-WFQFN 裸露焊盘
包装: 管件
供应商设备封装: 36-QFN-EP(6x5)
LT3957
APPLICATIONS INFORMATION
T SS = C SS ?
Soft-Start
The LT3957 contains several features to limit peak switch
currents and output voltage (V OUT ) overshoot during
start-up or recovery from a fault condition. The primary
purpose of these features is to prevent damage to external
components or the load.
High peak switch currents during start-up may occur in
switching regulators. Since V OUT is far from its ?nal value,
the feedback loop is saturated and the regulator tries to
charge the output capacitor as quickly as possible, resulting
in large peak currents. A large surge current may cause
inductor saturation or power switch failure.
The LT3957 addresses this mechanism with the SS pin.
As shown in Figure 1, the SS pin reduces the power
MOSFET current by pulling down the VC pin through
Q2. In this way the SS allows the output capacitor to
charge gradually toward its ?nal value while limiting the
start-up peak currents. The typical start-up waveforms
are shown in the Typical Performance Characteristics
section. The inductor current I L slewing rate is limited by
the soft-start function.
Besides start-up (with EN/UVLO), soft-start can also be
triggered by the following faults:
1. INTV CC < 2.85V
2. Thermal lockout (TLO > 165°C)
Any of these three faults will cause the LT3957 to stop
switching immediately. The SS pin will be discharged by
Q3. When all faults are cleared and the SS pin has been
discharged below 0.2V, a 10μA current source I S2 starts
charging the SS pin, initiating a soft-start operation.
The soft-start interval is set by the soft-start capacitor
selection according to the equation:
1.25V
10μA
FBX Frequency Foldback
When V OUT is very low during start-up, or an output short-
circuit on a SEPIC, an inverting, or a ?yback converter, the
switching regulator must operate at low duty cycles to keep
the power switch current below the current limit, since
the inductor current decay rate is very low during switch
off time. The minimum on-time limitation may prevent the
switcher from attaining a suf?ciently low duty cycle at the
programmed switching frequency. So, the switch current
may keep increasing through each switch cycle, exceed-
ing the programmed current limit. To prevent the switch
peak currents from exceeding the programmed value, the
LT3957 contains a frequency foldback function to reduce
the switching frequency when the FBX voltage is low (see
the Normalized Switching Frequency vs FBX graph in the
Typical Performance Characteristics section).
During frequency foldback, external clock synchroniza-
tion is disabled to prevent interference with frequency
reducing operation.
Loop Compensation
Loop compensation determines the stability and transient
performance. The LT3957 uses current mode control to
regulate the output which simpli?es loop compensation.
The optimum values depend on the converter topology, the
component values and the operating conditions (including
the input voltage, load current, etc.). To compensate the
feedback loop of the LT3957, a series resistor-capacitor
network is usually connected from the VC pin to SGND.
Figure 1 shows the typical VC compensation network.
For most applications, the capacitor should be in the
range of 470pF to 22nF, and the resistor should be in the
range of 5k to 50k. A small capacitor is often connected
in parallel with the RC compensation network to attenu-
ate the VC voltage ripple induced from the output voltage
ripple through the internal error ampli?er. The parallel
capacitor usually ranges in value from 10pF to 100pF. A
practical approach to design the compensation network
is to start with one of the circuits in this data sheet that
is similar to your application, and tune the compensation
network to optimize the performance. Stability should
then be checked across all operating conditions, including
load current, input voltage and temperature. Application
Note 76 is a good reference on loop compensation.
3957f
12
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LT3957EUHETRPBF 制造商:LINER 制造商全称:Linear Technology 功能描述:Boost, Flyback, SEPIC and Inverting Converter with 5A, 40V Switch
LT3957IUHE#PBF 功能描述:IC REG MULTI CONFIG ADJ 36VQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压(降压) 输出类型:固定 输出数:1 输出电压:1.2V,1.5V,1.8V,2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP,10-MSOP(0.118",3.00mm 宽)裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘
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LT3957IUHEPBF 制造商:LINER 制造商全称:Linear Technology 功能描述:Boost, Flyback, SEPIC and Inverting Converter with 5A, 40V Switch
LT3957IUHETRPBF 制造商:LINER 制造商全称:Linear Technology 功能描述:Boost, Flyback, SEPIC and Inverting Converter with 5A, 40V Switch