参数资料
| 型号： | LT4351IMS#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 15/20页 |
| 文件大小： | 0K |
| 描述： | IC CTLR MOSFET DIODE-OR 10MSOP |
| 标准包装： | 50 |
| 应用： | 并行/冗余电源 |
| FET 型： | N 沟道 |
| 输出数： | 1 |
| 内部开关： | 无 |
| 延迟时间 - 关闭： | 600ns |
| 电源电压： | 1.2 V ~ 18 V |
| 电流 - 电源： | 1.4mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 管件 |
| 产品目录页面： | 1338 (CN2011-ZH PDF) |
LT4351
APPLICATIONS INFORMATION
P GATE = f G ? V DD ? Q G ? ? 1 – IN ?
Since the boost regulator supplies current for V DD , the
current is the V DD supply current (3.5mA) plus the aver-
age current to charge the gate. For a gate charge of 50nC
at a 10kHz rate, this adds 0.5mA of current. The power
dissipated by the boost regulator to supply the 4mA is
shown in Figure 12, representing a more typical situation.
Finally, the gate driver dissipates power internally when
charging and discharging the gate of the MOSFETs. This
power depends on the input capacitance of the MOSFETs
and the frequency of charge and discharge. The power
associated with this can be approximated by:
? V ?
? 16 ?
where Q G is the required gate charge to charge the MOSFET
to the clamp voltage (7.4V) and f G is the frequency at which
the gate is charged and discharged. Normally f G is low and
the resulting power would be very low. Figure 13 shows
P GATE for a 50nC gate charge at a 1kHz rate.
Total power dissipation is the sum of all of P DCVIN , P DCVDD ,
P BOOST and P GATE . Figure 14 is representative of the total
power dissipation of a typical application at steady state.
The die junction temperature is then computed as:
T J = T A + θ JA ? P TOTAL
where T J is the die junction temperature, T A is the ambi-
ent temperature, θ JA is the thermal resistance of the part
(120°C/W) and P TOTAL is ascertained from the above.
Therefore, a 0.1W power dissipation causes a 12° tem-
perature rise above ambient.
0.025
0.020
0.015
0.010
L = 4.7μH
0.004
0.003
0.002
0.001
f GATE = 1kHz
Q G = 50nC
0.005
0
5
10
15
20
0
0
5
10
15
20
V IN (V)
4351 F12
V IN (V)
4351 F13
Figure 12. P BOOST(TYP)
0.16
0.14
0.12
0.10
0.08
V DD = V IN + 10
0.5mA GATE CURRENT
L = 10μH
L = 4.7μH
Figure 13. P GATE vs V IN (V DD = V IN + 10.7)
0.06
0
5
10
15
20
V IN (V)
4351 F14
Figure 14. Total Power (Typical)
4351fd
15
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