参数资料
型号: LT8582IDKD#PBF
厂商: Linear Technology
文件页数: 28/36页
文件大小: 0K
描述: IC REG MULTI CONFIG ADJ 3A 24DFN
标准包装: 52
类型: 升压(升压),反相,回扫,Sepic
输出类型: 可调式
输出数: 2
输出电压: 最高 42V
输入电压: 2.5 V ~ 22 V
PWM 型: 电流模式
频率 - 开关: 200kHz ~ 2.5MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-WFDFN 裸露焊盘
包装: 管件
供应商设备封装: 24-DFN(7x4)
LT8582
APPENDIX
Error Amp Pole:
g mp
I VIN
IN
V OUT
VIN
V OUT
R ESR
C OUT
R L
P2 =
1
2 ? π ? (R O + R C) C C
Error Amp Zero:
g ma
+
1.204V
REFERENCE
R2
C PL
R1
Z1 =
1
2 ? π ? R C ? C C
Z2 =
C F
R C
C C
R O
R2
FBX
8582 F15
ESR Zero:
1
2 ? π ? R ESR ? C OUT
C C : COMPENSATION CAPACITOR
C OUT : OUTPUT CAPACITOR
C PL : PHASE LEAD CAPACITOR
RHP Zero:
C F : HIGH FREQUENCY FILTER CAPACITOR
g ma : TRANSCONDUCTOR ERROR AMPLIFIER INSIDE THE CHIP
g mp : POWER STAGE TRANSCONDUCTANCE AMPLIFIER
R C : COMPENSATION RESISTOR
R L : OUTPUT RESISTANCE DEFINED AS V OUT /I LOADMAX
R O : OUTPUT RESISTANCE OF gma
Z3 =
V IN2 ? R L
2 ? π ? V OUT2 ? L
P3 > s
R1, R2: OUTPUT VOLTAGE FEEDBACK RESISTOR DIVIDER
R ESR : OUTPUT CAPACITOR ESR
: CONVERTER EFFICIENCY (~88% AT HIGHER CURRRENTS)
Figure 15. Boost Converter Equivalent Model
Note that the maximum output currents of g mp and g ma
High Frequency Pole:
f
3
Phase Lead Zero:
are finite. The output current of the g mp stage is limited
by the minimum switch current limit (see the Electrical
Specifications) and the output of the g ma stage is nominally
Z4 =
1
2 ? π ? R1 ? C PL
limited to about ±12μA.
Phase Lead Pole:
From Figure 15, the DC gain, poles and zeros can be
calculated as follows:
DC GAIN:
P4 =
2? π
1
0.5 ? R 1 ? R 2
R 1 + 0.5R 2
? C PL
A DC = (g ma ? R O ) ? g mp ? ? η ?
P 1 =
? L ? ?
P5 =
2? π ? C
,C F < C
?
?
Output Pole:
2
2 ? π ? R L + C OUT
V IN
V OUT
R ? 0.5R 2
2 ? R 1 + 0.5R 2
Error Amp Filter Pole:
1
R ? R O
R C + R O
? C F
C
10
8582f
28
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