参数资料
型号: LTC1198-2BCS8
厂商: Linear Technology
文件页数: 9/28页
文件大小: 0K
描述: IC ADC 8BIT 750KHZ SAMPL 8-SOIC
标准包装: 100
位数: 8
采样率(每秒): 750k
数据接口: 串行
转换器数目: 1
功率耗散(最大): 50mW
电压电源: 单电源
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
输入数目和类型: 1 个单端,单极
LTC1196/LTC1198
17
119698fb
APPLICATIONS INFORMATION
REDUCING POWER CONSUMPTION
The LTC1196/LTC1198 can sample at up to a 1MHz rate,
drawing only 50mW from a 5V supply. Power consumption
can be reduced in two ways. Using a 3V supply lowers the
power consumption on both devices by a factor of ve,
to 10mW. The LTC1198 can reduce power even further
because it shuts down whenever it is not converting.
Figure 5 shows the supply current versus sample rate for
the LTC1196 and LTC1198 on 3V and 5V. To achieve such
a low power consumption, especially for the LTC1198,
several things must be taken into consideration.
DIN and CLK with CS = HIGH; they can continue to run
without drawing current.
Minimize CS LOW Time (LTC1198)
In systems that have signicant time between conver-
sions, lowest power drain will occur with the minimum CS
LOW time. Bringing CS LOW, transferring data as quickly
as possible, then bringing it back HIGH will result in the
lowest current drain. This minimizes the amount of time
the device draws power.
OPERATING ON OTHER THAN 5V SUPPLIES
The LTC1196/LTC1198 operate from single 2.7V to 6V
supplies. To operate the LTC1196/LTC1198 on other than
5V supplies, a few things must be kept in mind.
Input Logic Levels
The input logic levels of CS, CLK and DIN are made to
meet TTL on 5V supply. When the supply voltage varies,
the input logic levels also change (see the Digital Input
Logic Threshold vs Supply Voltage curve in the Typical
Performance Characteristics section). For these two ADCs
to sample and convert correctly, the digital inputs have to
be in the logical LOW and HIGH relative to the operating
supply voltage. If achieving micropower consumption
is desirable on the LTC1198, the digital inputs must go
rail-to-rail between supply voltage and ground (see the
Reducing Power Consumption section).
Clock Frequency
The maximum recommended clock frequency is 14.4MHz
at 25°C for the LTC1196/LTC1198 running off a 5V supply.
With the supply voltage changing, the maximum clock
frequency for the devices also changes (see the Maximum
Clock Rate vs Supply Voltage curve in the Typical Perfor-
mance Characteristics section). If the supply is reduced,
the clock rate must also be reduced. At 3V, the devices
are specied with a 5.4MHz clock at 25°C.
SAMPLE RATE (Hz)
0.01
SUPPLY
CURRENT
(mA)
0.1
1
10
100
10k
100k
1196/98 F05
0.001
1k
1M
LT1198 VCC = 2.87V
LT1196 VCC = 2.87V
LT1198 VCC = 5V
Figure 5. Supply Current vs Sample Rate for LTC1196/LTC1198
Operating on 5V and 2.7V Supplies
Shutdown (LTC1198)
Figure 2 shows the operating sequence of the LTC1198.
The converter draws power when the CS pin is LOW and
powers itself down when that pin is HIGH. For lowest
power consumption in shutdown, the CS pin should be
driven with CMOS levels (0V to VCC) so that the CS input
buffer of the converter will not draw current.
When the CS pin is HIGH (= supply voltage), the LTC1198
is in shutdown mode and draws only leakage current.
The status of the DIN and CLK input has no effect on the
supply current during this time. There is no need to stop
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