参数资料
型号: LTC1266IS#TR
厂商: Linear Technology
文件页数: 12/20页
文件大小: 0K
描述: IC REG CTRLR BST PWM CM 16-SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 400kHz
占空比: 100%
电源电压: 3.5 V ~ 18 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
LTC1266
LTC1266-3.3/LTC1266-5
APPLICATIO S I FOR ATIO
1000
800
600
400
200
L = 50 μ H
R SENSE = 0.02 ?
L = 25 μ H
R SENSE = 0.02 ?
L = 50 μ H
R SENSE = 0.05 ?
Driving N-Channel Topside MOSFETs
Driving an N-channel topside MOSFET (PINV, Pin 3, tied to
PWR V IN ) is a little trickier than driving a P-channel since
the gate voltage must be positive with respect to the
source to turn it on, which means that the gate voltage
must be higher than V IN . This requires either a second
supply at least V GS(ON) above V IN or a bootstrapping circuit
to boost the V IN to the proper level. The easiest method is
using a higher supply (see Figure 14) but if one is not
0
0
1
2
3
4
5
available, the bootstrap method can be used at the ex-
(V IN – V OUT ) VOLTAGE (V)
1266 F04
Figure 4. Minimum Value of C OUT
series would normally be in continuous operation. The
output remains in regulation at all times. This minimum
capacitance requirement may be relaxed if Burst Mode
operation is disabled.
N-Channel vs P-Channel MOSFETs
The LTC1266 has the capability to drive either an
N-channel or a P-channel topside switch to give the user
more flexibility. N-channel MOSFETs are superior in per-
formance to P-channel due to their lower R DS(ON) and
lower gate capacitance and are typically less expensive;
pense of an additional diode (see Figure 1). The bootstrap
works by charging the bootstrap capacitor to V IN during
the off-time. During the on-time, the bottom plate of the
capacitor is pulled up to V IN so that the voltage at Pin 2 is
now twice V IN (plus any ringing on the switch node).
Since the maximum allowable voltage at Pin 2 is 20V, the
Figure 1 bootstrap circuit limits V IN to less than 10V. A
higher V IN can be achieved if the bootstrap capacitor is
charged to a voltage less than V IN , in which case
V IN(MAX) = 20 – V CAP .
N-channel mode, internal circuitry limits the maximum
on-time to 60 μ s to guarantee start-up of the bootstrap
circuit. This maximum on-time reduces the maximum
duty cycle to:
however, they do have a slightly more complicated gate
drive requirement and a more limited input voltage range
(see following sections).
Max Duty Cycle =
60 μ s
60 μ s + t OFF
) )
V TRIP = 1.25 1 + R2
Driving P-Channel Topside MOSFETs
The P-channel topside switch circuit configuration is the
most straightforward due to the requirement of only one
supply voltage level. This is due to the negative gate
threshold of the P-channel MOSFET which allows the
MOSFET to be switched on and off by swinging the gate
between V IN and ground. The phase invert (Pin 3) is tied
to ground to choose this operating mode. Normally, the
converter input (V IN ) is connected to the LTC1266 supply
Pins 2 and 5 and can go as high as 20V. Pin 2 supplies the
high frequency current pulses to switch the MOSFETs and
should be decoupled with a 0.1 μ F to 1 μ F ceramic capaci-
tor. Pin 5 supplies most of the quiescent power to the rest
of the chip.
12
which slightly increases the minimum input voltage at
which dropout occurs. However, because of the superior
on-conductance of the N-channel, the dropout perfor-
mance of an all N-channel regulator is still better (see
Figure 5) even with the duty cycle limitation, except at light
loads.
Low-Battery Comparator
The LTC1266 has an on-chip low-battery comparator
which can be used to sense a low-battery condition when
implemented as shown in Figure 6. The resistor divider
R1, R2 sets the comparator trip point as follows:
R1
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