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参数资料
| 型号： | LTC1285IS8#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 2/24页 |
| 文件大小： | 0K |
| 描述： | IC A/D CONV SAMPLING 12BIT 8SOIC |
| 标准包装： | 2,500 |
| 位数： | 12 |
| 采样率（每秒）： | 7.5k |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 480µW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，单极 |
10
LTC1285/LTC1288
APPLICATION INFORMATION
WU
U
OVERVIEW
The LTC1285 and LTC1288 are 3V micropower, 12-bit,
successive approximation sampling A/D converters. The
LTC1285 typically draws 160
A of supply current when
sampling at 7.5kHz while the LTC1288 nominally con-
sumes 210
A of supply current when sampling at 6.6 kHz.
The extra 50
A of supply current on the LTC1288 comes
from the reference input which is intentionally tied to the
supply. Supply current drops linearly as the sample rate is
reduced (see Supply Current vs Sample Rate). The ADCs
automatically power down when not performing conver-
sions, drawing only leakage current. They are packaged in
8-pin SO and DIP packages. The LTC1285 and LTC1288
operate on a single supply from 2.7V to 6V.
Both the LTC1285 and the LTC1288 contain a 12-bit,
switched-capacitor ADC, a sample-and-hold, and a serial
port (see Block Diagram). Although they share the same
basic design, the LTC1285 and LTC1288 differ in some
respects. The LTC1285 has a differential input and has an
external reference input pin. It can measure signals float-
ing on a DC common-mode voltage and can operate with
reduced spans to 1.5V. Reducing the spans allows it to
achieve 366
V resolution. The LTC1288 has a two-chan-
nel input multiplexer and can convert either channel with
respect to ground or the difference between the two. The
reference input is tied to the supply pin.
SERIAL INTERFACE
The 2-channel LTC1288 communicates with micropro-
cessors and other external circuitry via a synchronous,
half duplex, 4-wire serial interface. The single channel
LTC1285 uses a 3-wire interface (see Operating Sequence
in Figures 1 and 2).
Figure 1. LTC1285 Operating Sequence
CLK
CS
tCYC
B11
B5
B6
B7
B8
B9
B10
B11
HI-Z
DOUT
tCONV
tDATA
HI-Z
tsuCS
NULL
BIT
B4
B3
B2
B1
POWER
DOWN
POWER DOWN
B0*
NULL
BIT
B10
B9
B8
tSMPL
(MSB)
CLK
CS
tCYC
B11*
B5
B6
B7
B8
B9
B10
B11
HI-Z
DOUT
tCONV
tDATA
HI-Z
tsuCS
NULL
BIT
LTC1285/88 F01
B4
B3
B4
B5
B6
B7
B2
B1
B0
B1
B10
B9
B8
tSMPL
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW,
THE ADC WILL OUTPUT ZEROS INDEFINITELY.
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW,
THE ADC WILL OUTPUT LSB-FIRST DATA THEN FOLLOWED WITH ZEROS INDEFINITELY.
tDATA: DURING THIS TIME, THE BIAS CIRCUIT AND THE COMPARATOR POWER DOWN AND THE REFERENCE INPUT
BECOMES A HIGH IMPEDANCE NODE, LEAVING THE CLK RUNNING TO CLOCK OUT LSB-FIRST DATA OR ZEROES.
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