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| 型号： | LTC1430CS#TR |
| 厂商： | Linear Technology |
| 文件页数： | 7/16页 |
| 文件大小： | 0K |
| 描述： | IC SW REG CNTRLR STEP-DWN 16SOIC |
| 标准包装： | 2,500 |
| 应用： | 控制器，Intel Pentium? |
| 输入电压： | 4 V ~ 8 V |
| 输出数： | 1 |
| 输出电压： | 3.3V，可调 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 带卷 (TR) |
LTC1430
APPLICATIO S I FOR ATIO
MOSFET Gate Drive
Gate drive for the top N-channel MOSFET M1 is supplied
from PV CC1 . This supply must be above PV CC ( the main
power supply input) by at least one power MOSFET
V GS(ON) for efficient operation. An internal level shifter
allows PV CC1 to operate at voltages above V CC and PV CC ,
up to 13V maximum. This higher voltage can be supplied
with a separate supply, or it can be generated using a
simple charge pump as shown in Figure 4. When using a
separate PV CC1 supply, the PV CC input may exhibit a large
inrush current if PV CC1 is present during power up. The
90% maximum duty cycle ensures that the charge pump
will always provide sufficient gate drive to M1. Gate drive
for the bottom MOSFET M2 is provided through PV CC2 for
16-lead devices or V CC /PV CC2 for 8-lead devices. PV CC2
can usually be driven directly from PV CC with 16-lead
parts, although it can also be charge pumped or connected
to an alternate supply if desired. The 8-lead parts require
an RC filter from PV CC to ensure proper operation; see
Input Supply Considerations.
EXTERNAL COMPONENT SELECTION
Power MOSFETs
Two N-channel power MOSFETs are required for most
LTC1430 circuits. These should be selected based prima-
rily on threshold and on-resistance considerations; ther-
mal dissipation is often a secondary concern in high
efficiency designs. Required MOSFET threshold should be
determined based on the available power supply voltages
and/or the complexity of the gate drive charge pump
scheme. In 5V input designs where an auxiliary 12V supply
is available to power PV CC1 and PV CC2 , standard MOSFETs
with R DS(ON) specified at V GS = 5V or 6V can be used with
good results. The current drawn from this supply varies
with the MOSFETs used and the LTC1430’s operating
frequency, but is generally less than 50mA.
LTC1430 designs that use a doubler charge pump to
generate gate drive for M1 and run from PV CC voltages
below 7V cannot provide enough gate drive voltage to fully
enhance standard power MOSFETs. When run from 5V, a
doubler circuit may work with standard MOSFETs, but the
MOSFET R ON may be quite high, raising the dissipation in
the FETs and costing efficiency. Logic level FETs are a
better choice for 5V PV CC systems; they can be fully
enhanced with a doubler charge pump and will operate at
maximum efficiency. Doubler designs running from PV CC
voltages near 4V will begin to run into efficiency problems
even with logic level FETs; such designs should be built
with tripler charge pumps (see Figure 5) or with newer,
super low threshold MOSFETs. Note that doubler charge
pump designs running from more than 7V and all tripler
charge pump designs should include a zener clamp diode
D Z at PV CC1 to prevent transients from exceeding the
absolute maximum rating at that pin.
PV CC
D Z
12V
1N5817
PV CC
OPTIONAL
USE FOR PV CC ≥ 7V
1N4148
1N5242
1N5817
1N5817
D Z
12V
PV CC2
PV CC1
0.1 μ F
10 μ F
PV CC2
PV CC1
0.1 μ F
0.1 μ F
1N5242
G1
M1
G1
M1
L1
V OUT
L1
V OUT
G2
M2
+
C OUT
G2
M2
+
C OUT
LTC1430
Figure 4. Doubling Charge Pump
LTC1430 ? F04
LTC1430
Figure 5. Tripling Charge Pump
LTC1430 ? F05
7
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