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| 型号： | LTC1473LCGN#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/16页 |
| 文件大小： | 0K |
| 描述： | IC SWITCH DVR PWRPATH DUAL16SSOP |
| 标准包装： | 2,500 |
| 系列： | PowerPath™ |
| 应用： | 手持/移动设备 |
| FET 型： | N 沟道 |
| 输出数： | 2 |
| 内部开关： | 无 |
| 延迟时间 - 开启： | 22µs |
| 延迟时间 - 关闭： | 1µs |
| 电源电压： | 2.8 V ~ 9 V |
| 电流 - 电源： | 100µA |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SSOP |
| 包装： | 带卷 (TR) |
LTC1473L
APPLICATIO S I FOR ATIO
The back-to-back topology also allows for independent
control of each half of the switch pair which facilitates
bidirectional inrush current limiting and the so-called
“2-diode mode” described in the following section.
The 2-Diode Mode
Under normal operating conditions, both halves of each
switch pair are turned on and off simultaneously. For
example, when the input power source is switched from
BAT1 to DCIN in Figure 4, both gates of switch pair SW
A1/B1 are normally turned off and both gates of switch pair
SW A2/B2 are turned on. The back-to-back body diodes in
switch pair, SW A1/B1, block current flow in or out of the
BAT1 input connector.
In the “2-diode mode,” only the first half of each power
path switch pair, i.e., SW A1 and SW A2, is turned on; and
the second half, i.e., SW B1 and SW B2, is turned off. These
two switch pairs now act simply as two diodes connected
to the two main input power sources as illustrated in
Figure 4. The power path diode with the highest input
voltage passes current through to the output load to
ensure that the output is powered even under start-up or
abnormal operating conditions. (An undervoltage lockout
circuit defeats this mode when the V + pin drops below
2.5V. The supply to V + comes from the main power
SW B1
sources, DCIN and BAT1 through two common cathode
Schottky diodes as shown in Figure 1.)
The 2-diode mode is asserted by applying an active low to
the DIODE input.
COMPONENT SELECTION
N-Channel Switches
The LTC1473L adaptive inrush limiting circuitry permits
the use of a wide range of logic-level N-Channel MOSFET
switches. A number of dual low R DS(ON) N-channel switches
in 8-lead surface mount packages are available that are
well suited for LTC1473L applications.
The maximum allowable drain-source voltage, V DS(MAX) ,
of the two switch pairs, SW A1/B1 and SW A2/B2 must be
high enough to withstand the maximum input DC supply
voltage. Since the DC supply is in the 3.3V to 10V range,
12V MOSFET switches will suffice.
As a general rule, select the switch with the lowest
R DS(ON) at the maximum allowable V DS . This will mini-
mize the heat dissipated in the switches while increasing
the overall system efficiency. Higher switch resistances
can be tolerated in some systems with lower current
requirements, but care should be taken to ensure that the
BAT1
SW A1
ON
OFF
SW B2
R SENSE
+
C IN
OUTPUT
LOAD
SW A2
DCIN
ON
OFF
LTC1473L
1473 F04
Figure 4. LTC1473L PowerPath Switches in 2-Diode Mode
9
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