参数资料
型号: LTC1559CGN-5#TRPBF
厂商: Linear Technology
文件页数: 14/20页
文件大小: 0K
描述: IC BACKUP BATT CNTRLR 5V 16-SSOP
标准包装: 2,500
功能: 备份管理
电池化学: 镍镉
电源电压: 4.4 V ~ 5.5 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-SSOP
包装: 带卷 (TR)
LTC1559-3.3/LTC1559-5
APPLICATIO N S I N FOR M ATIO N
CTL
(A)
0V
t CTL < 20ms
(B)
> 0.25V
20ms < t CTL < 2s
shut off completely. Note that the backup cell slowly
discharges through R EXT in this mode.
RESET
Inductor Selection
20ms
DEBOUNCE
“SOFT” PUSH-BUTTON RESET AT CTL
(A) CTL < 0.25V FOR LESS THAN 20ms
(B) CTL > 0.25V FOR MORE THAN 20ms
100 μ s
100 μ s
The LTC1559 is designed to operate with a recommended
inductor value of 22 μ H ( ± 20%) with < 0.2 ? DC resistance.
Using inductor values above 22 μ H will deliver more output
CTL
RESET
CTL
0V
t CTL > 2s
2s
“HARD” PUSH-BUTTON RESET AT CTL
CTL < 0.25V FOR MORE THAN 2s
0V
200ms
> 0.25V
power but will cause the gas gauge counter to count
inaccurately and under-recharge the backup cell. At the
same time, the N-channel transistor timer will limit the
peak current if the charging time becomes overextended
due to the higher inductor value. Using inductor values
lower than 22 μ H will degrade the boost converter’s maxi-
mum output power and cause the gas gauge counter to
overcharge the backup cell. Table 3 lists a few recom-
RESET
20ms
mended surface mount inductor part numbers.
Table 3. Recommended Inductors
20ms
PART
TYP INDUCTOR
DCR
20ms DEBOUNCE AT FALLING AND RISING RESET EDGE
Figure 5. Push-Button Resets
1559 F05
MANUFACTURER
Sumida
Sumida
NUMBER
CD54-220
CDRH73/74
VALUE
22 μ H ± 20%
22 μ H ± 20%
( ? )
0.18
0.2/0.11
LTC1559 disables the boost converter if it is in backup
mode. All signals at the CTL pin are debounced for 20ms
to prevent multiple resets, allowing the CTL pin to be
connected directly to a push-button to ground.
The RESET pin is an open-drain output that requires an
external pull-up resistor. The RESET pin is a TTL compat-
ible CMOS output.
Shutdown
The 16-pin LTC1559 has a TTL compatible input, SHDN
that shuts down the whole chip, asserts the RESET and
RESET pins and places the CTL, V BAK and SW pins into
high impedance states. The SHDN pin has an internal pull-
up of 8 μ A that ensures the chip will not shut down if the pin
is left floating. The chip consumes less than 50 μ A during
shutdown.
Although there is no SHDN pin for the SO-8 package, the
user can shut down the part by pulling CTL to ground. The
chip enters “hard” reset leaving only the bandgap and
comparators alive. The charger and the boost converter
14
Capacitor Selection
The LTC1559 requires a V CC capacitor of 100 μ F to ensure
that boost converter can regulate the output under maxi-
mum load conditions. The capacitor’s ESR should be
small (<0.2 ? ) to minimize voltage spikes that might
incorrectly trigger the LTC1559’s internal V CC compara-
tors. Note that the LTC1559 can usually share the output
capacitor with the system regulator. However, a 1 μ F is
recommended directly at the LTC1559’s V CC pin. The V CC
capacitor’s ratings like V MAX , I RIPPLE(RMS) all must meet
the system regulator’s specifications as well.
Battery Selection
A primary application for the LTC1559 is a “bridging”
supply, only providing backup current while the main
system battery is being replaced. In these applications,
the LTC1559 works well with NiCd button cells or small
cylindrical cells, reducing system costs and board space.
It is optimized for use with up to 512mAhr battery
capacities.
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