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参数资料
| 型号： | LTC1604CG#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | IC A/D CONV 16BIT SAMPLNG 36SSOP |
| 标准包装： | 2,000 |
| 位数： | 16 |
| 采样率（每秒）： | 333k |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 350mW |
| 电压电源： | 双 ± |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 36-SSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 2 个单端，双极；1 个差分，双极 |
LTC1604
15
1604fa
APPLICATIONS INFORMATION
Figure 15b. Offset and Full-Scale Adjust Circuit
–38μV (i.e., –0.5LSB) at AIN+ and adjust the offset at the
AIN– input until the output code flickers between 0000
0000 0000 0000 and 1111 1111 1111 1111. For full-scale
adjustment, an input voltage of 2.499886V (FS/2 – 1.5LSBs)
is applied to AIN+ and R2 is adjusted until the output code
flickers between 0111 1111 1111 1110 and 0111 1111
1111 1111.
BOARD LAYOUT AND GROUNDING
Wire wrap boards are not recommended for high resolu-
tion or high speed A/D converters. To obtain the best
performance from the LTC1604, a printed circuit board
with ground plane is required. Layout should ensure that
digital and analog signal lines are separated as much as
possible. Particular care should be taken not to run any
digital track alongside an analog signal track or underneath
the ADC. The analog input should be screened by AGND.
An analog ground plane separate from the logic system
ground should be established under and around the ADC.
Pin 5 to Pin 8 (AGNDs), Pin 10 (ADC’s DGND) and all other
analog grounds should be connected to this single analog
ground point. The REFCOMP bypass capacitor and the
DVDD bypass capacitor should also be connected to this
ANALOG
INPUT
1604 F15b
1
2
3
R4
100Ω
R7
50k
R3
24k
–5V
R6
24k
R8
50k
R5
47k
4
5
0.1μF
47μF
+
AIN
+
AIN
–
VREF
REFCOMP
AGND
LTC1604
analog ground plane. No other digital grounds should be
connected to this analog ground plane. Low impedance
analog and digital power supply common returns are
essential to low noise operation of the ADC and the foil
width for these tracks should be as wide as possible. In
applications where the ADC data outputs and control
signals are connected to a continuously active micropro-
cessor bus, it is possible to get errors in the conversion
results. These errors are due to feedthrough from the
microprocessor to the successive approximation com-
parator. The problem can be eliminated by forcing the
microprocessor into a WAIT state during conversion or by
using three-state buffers to isolate the ADC data bus. The
traces connecting the pins and bypass capacitors must
be kept short and should be made as wide as possible.
The LTC1604 has differential inputs to minimize noise
coupling. Common mode noise on the AIN+ and AIN– leads
will be rejected by the input CMRR. The AIN– input can be
used as a ground sense for the AIN+ input; the LTC1604
will hold and convert the difference voltage between AIN+
and AIN–. The leads to AIN+ (Pin 1) and AIN– (Pin 2) should
be kept as short as possible. In applications where this is
not possible, the AIN+ and AIN– traces should be run side
by side to equalize coupling.
SUPPLY BYPASSING
High quality, low series resistance ceramic, 10μF or 47μF
bypass capacitors should be used at the VDDandREFCOMP
pins as shown in Figure 16 and in the Typical Application
on the first page of this data sheet. Surface mount ceramic
capacitors such as Murata GRM235Y5V106Z016 provide
excellent bypassing in a small board space. Alternatively,
10μF tantalum capacitors in parallel with 0.1μF ceramic
capacitors can be used. Bypass capacitors must be located
as close to the pins as possible. The traces connecting the
pins and the bypass capacitors must be kept short and
should be made as wide as possible.
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