参数资料
型号: LTC1627CS8#TR
厂商: Linear Technology
文件页数: 11/16页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 0.5A 8SOIC
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 8.5 V
输入电压: 2.65 V ~ 8.5 V
PWM 型: 电流模式,混合
频率 - 开关: 35kHz ~ 350kHz
电流 - 输出: 500mA
同步整流器:
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 8-SOIC
LTC1627
APPLICATIO S I FOR ATIO
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V OUT immediately shifts by an amount
equal to ( ? I LOAD ? ESR), where ESR is the effective series
resistance of C OUT . ? I LOAD also begins to charge or dis-
charge C OUT , which generates a feedback error signal. The
regulator loop then acts to return V OUT to its steady-state
value. During this recovery time V OUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. The internal compensation provides adequate com-
pensation for most applications. But if additional compen-
sation is required, the I TH pin can be used for external
compensation as shown in Figure 7.
A second, more severe transient is caused by switching in
loads with large (>1 μ F) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C OUT , causing a rapid drop in V OUT . No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
C C2
the load rise time is limited to approximately (25 ? C LOAD ).
Thus, a 10 μ F capacitor would require a 250 μ s rise time,
limiting the charging current to about 130mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1627. These items are also illustrated graphically in
the layout diagram of Figure 7. Check the following in your
layout:
1. Are the signal and power grounds segregated? The
LTC1627 signal ground consists of the resistive
divider, the optional compensation network (R C and
C C1 ), C SS and C C2 . The power ground consists of the
(–) plate of C IN , the (–) plate of C OUT and Pin 4 of the
LTC1627. The power ground traces should be kept
short, direct and wide. The signal ground and power
ground should converge to a common node in a star-
ground configuration.
2. Does the V FB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of C OUT and signal ground.
OPTIONAL
R C
C C1
1
I TH
SYNC/FCB
8
OPTIONAL
C SS
2
RUN/SS
V DR
7
3
V FB
LTC1627
V IN
6
C V
+
4
GND
SW
5
L1
+
+
D1
C IN
R2
+
V OUT
C OUT
V IN
BOLD LINES INDICATE
HIGH CURRENT PATHS
R1
D2
C B
1627 F07
Figure 7. LTC1627 Layout Diagram
11
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