参数资料
型号: LTC1628IG-PG
厂商: Linear Technology
文件页数: 23/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-SSOP
标准包装: 47
PWM 型: 电流模式
输出数: 2
频率 - 最大: 360kHz
占空比: 99.4%
电源电压: 3.5 V ~ 30 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
包装: 管件
LTC1628/LTC1628-PG
APPLICATIO S I FOR ATIO
reduced to half or alternatively the amount of output
capacitance can be reduced for a particular application. A
complete explanation is included in Design Solutions 10.
(See www.linear.com.)
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1628 circuits: 1) LTC1628 V IN current (in-
cluding loading on the 3.3V internal regulator), 2) INTV CC
regulator current, 3) I 2 R losses, 4) Topside MOSFET
transition losses.
1. The V IN current has two components: the first is the DC
supply current given in the Electrical Characteristics table,
which excludes MOSFET driver and control currents; the
second is the current drawn from the 3.3V linear regulator
output. V IN current typically results in a small (<0.1%) loss.
2. INTV CC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high to
low again, a packet of charge dQ moves from INTV CC to
ground. The resulting dQ/dt is a current out of INTV CC that
is typically much larger than the control circuit current. In
continuous mode, I GATECHG =f(Q T +Q B ), where Q T and Q B
are the gate charges of the topside and bottom side
MOSFETs.
Supplying INTV CC power through the EXTV CC switch input
from an output-derived source will scale the V IN current
required for the driver and control circuits by a factor of
(Duty Cycle)/(Efficiency). For example, in a 20V to 5V
application, 10mA of INTV CC current results in approxi-
mately 2.5mA of V IN current. This reduces the mid-current
loss from 10% or more (if the driver was powered directly
from V IN ) to only a few percent.
3. I 2 R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resistor,
and input and output capacitor ESR. In continuous mode
the average output current flows through L and R SENSE ,
but is “chopped” between the topside MOSFET and the
synchronous MOSFET. If the two MOSFETs have approxi-
mately the same R DS(ON) , then the resistance of one
MOSFET can simply be summed with the resistances of L,
R SENSE and ESR to obtain I 2 R losses. For example, if each
R DS(ON) = 30m ? , R L = 50m ? , R SENSE = 10m ? and R ESR
= 40m ? (sum of both input and output capacitance
losses), then the total resistance is 130m ? . This results in
losses ranging from 3% to 13% as the output current
increases from 1A to 5A for a 5V output, or a 4% to 20%
loss for a 3.3V output. Efficiency varies as the inverse
square of V OUT for the same external components and
output power level. The combined effects of increasingly
lower output voltages and higher currents required by
high performance digital systems is not doubling but
quadrupling the importance of loss terms in the switching
regulator system!
4. Transition losses apply only to the topside MOSFET(s),
and become significant only when operating at high input
voltages (typically 15V or greater). Transition losses can
be estimated from:
Transition Loss = (1.7) V IN2 I O(MAX) C RSS f
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% efficiency degradation in portable systems. It is very
important to include these “system” level losses during
the design phase. The internal battery and fuse resistance
losses can be minimized by making sure that C IN has
adequate charge storage and very low ESR at the switch-
ing frequency. A 25W supply will typically require a
minimum of 20 μ F to 40 μ F of capacitance having a maxi-
mum of 20m ? to 50m ? of ESR. The LTC1628 2-phase
architecture typically halves this input capacitance re-
quirement over competing solutions. Other losses includ-
ing Schottky conduction losses during dead-time and
inductor core losses generally account for less than 2%
total additional loss.
1628fb
23
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LTC1628IGSYNC 制造商:Linear Technology 功能描述:
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