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参数资料
| 型号： | LTC1702IGN#TR |
| 厂商： | Linear Technology |
| 文件页数： | 22/36页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 24-SSOP |
| 标准包装： | 2,500 |
| 系列： | PolyPhase® |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 750kHz |
| 占空比： | 93% |
| 电源电压： | 3 V ~ 7 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
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LTC1702
APPLICATIO N S I N FOR M ATIO N
“Type 3” loops (Figure 11) use two poles and two zeros to
obtain a 180 ° phase boost in the middle of the frequency
band. A properly designed type 3 circuit can maintain
acceptable loop stability even when low output capacitor
ESR causes the LC section to approach 180 ° phase shift
well above the initial LC roll-off. As with a type 2 circuit, the
loop should cross through 0dB in the middle of the phase
bump to maximize phase margin. Many LTC1702 circuits
using low ESR tantalum or OS-CON output capacitors
need type 3 compensation to obtain acceptable phase
margin with a high bandwidth feedback loop.
C2
Applications that require optimized transient response will
need to recalculate the compensation values specifically
for the circuit in question. The underlying mathematics are
complex, but the component values can be calculated in a
straightforward manner if we know the gain and phase of
the modulator at the crossover frequency.
Modulator gain and phase can be measured directly from
a breadboard, or can be simulated if the appropriate
parasitic values are known. Measurement will give more
accurate results, but simulation can often get close enough
to give a working system. To measure the modulator gain
and phase directly, wire up a breadboard with an LTC1702
C3
R3
R2
C1
and the actual MOSFETs, inductor, and input and output
capacitors that the final design will use. This breadboard
should use appropriate construction techniques for high
IN
R1
R B
–
+
OUT
speed analog circuitry: bypass capacitors located close to
the LTC1702, no long wires connecting components,
V REF
1702 F11a
Figure 11a. Type 3 Amplifier Schematic Diagram
appropriately sized ground returns, etc. Wire the feedback
amplifier as a simple type 1 loop, with a 10k resistor from
V OUT to FB and a 0.1 μ F feedback capacitor from COMP to
FB. Choose the bias resistor (R B ) as required to set the
desired output voltage. Disconnect R B from ground and
GAIN
(dB)
–6dB/OCT
PHASE
(DEG)
connect it to a signal generator or to the source output of
a network analyzer (Figure 12) to inject a test signal into
0
GAIN
+6dB/OCT
–6dB/OCT
0
the loop. Measure the gain and phase from the COMP pin
to the output node at the positive terminal of the output
capacitor. Make sure the analyzer’s input is AC coupled so
–90
–180
that the DC voltages present at both the COMP and V OUT
5V
PHASE
–270
1702 F11b
10 μ F
+
10 ? MBR0530T
V CC PV CC
+
C IN
BOOST2
1 μ F
Figure 11B. Type 3 Amplifier Transfer Function
V COMP
TG
1/2 LTC1702
QT
L EXT
V OUT
Feedback Component Selection
TO
ANALYZER 0.1 μ F
NC
COMP
FB
RUN/SS
SW
BG
FCB
QB
+
TO
ANALYZER
C OUT
Selecting the R and C values for a typical type 2 or type 3
loop is a nontrivial task. The applications shown in this data
sheet show typical values, optimized for the power com-
AC
SOURCE
FROM
ANALYZER
R B
10k
FAULT
SGND PGND
ponents shown. They should give acceptable performance
with similar power components, but can be way off if even
one major power component is changed significantly.
1702 F12
Figure 12. Modulator Gain/Phase Measurement Set-Up
1702fa
22
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