参数资料
型号: LTC1702IGN#TR
厂商: Linear Technology
文件页数: 29/36页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 24-SSOP
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电压模式
输出数: 2
频率 - 最大: 750kHz
占空比: 93%
电源电压: 3 V ~ 7 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
LTC1702
APPLICATIO N S I N FOR M ATIO N
cycles. Over just a few cycles, however, the external
components conspire to limit the speed that the output
can move. Consider our typical 5V to 1.6V circuit, sub-
jected to a 1A to 5A load transient. Initially, the loop is in
regulation and the DC current in the output capacitor is
zero. Suddenly, an extra 4A start flowing out of the output
capacitorwhiletheinductorisstillsupplyingonly1A.This
sudden change will generate a (4A)(C ESR )voltage step at
the output; with a typical 0.015 ? output capacitor ESR,
this is a 60mV step at the output, or 3.8% (for a 1.6V output
voltage).
Very quickly, the feedback loop will realize that something
has changed and will move at the bandwidth allowed by
the external compensation network towards a new duty
cycle. If the bandwidth is set to 50kHz, the COMP pin will
get to 60% of the way to 90% duty cycle in 3 μ s. Now the
inductor is seeing 3.5V across itself for a large portion of
the cycle, and its current will increase from 1A at a rate set
by di/dt = V/L. If the inductor value is 0.5 μ H, the di/dt will
be 3.5V/0.5 μ H or 7A/ μ s. Sometime in the next few micro-
seconds after the switch cycle begins, the inductor current
Note that the output voltage will stop dropping before the
inductor current reaches this new output current level.
Recall that any practical output capacitor looks like a pure
capacitance in series with some amount of ESR. When a
load transient hits, virtually all of the initial voltage drop at
the output is due to IR drop across the ESR. The output
capacitance begins to discharge at the same time and
continues until the inductor current rises to match the new
output current level.
The output voltage, however, will turn around and start
heading the right way before this happens. The next time
the top MOSFET turns on, the inductor current will begin
increasing linearly. This increasing current flows almost
entirely into the capacitor, going through the ESR as it
does so (Figure 16). Positive di/dt in the inductor causes
positive dv/dt in the ESR, regardless of what the “pure”
capacitance is doing. The output voltage will turn around
when the positive dv/dt across the ESR exceeds the
negative dv/dt across the pure capacitance. If the expected
load step ( ? I) is known, an optimum inductor value can be
chosen:
will have risen to the 5A level of the load current and the
output capacitor will stop losing charge.
L ≤ ( V IN – V OUT ) ? C ?
ESR
? I
I L
I OUT
I L
I OUT
V ESR
V ESR
V CAP
V CAP
I L
V OUT
V SW
L
C OUT
+
V ESR
+
V CAP
V OUT
I OUT
V OUT
TRANSIENT
I L > I OUT
V OUT(NOMINAL)
TIME
1702 F16b
1702 F16a
HITS
V OUT
TURNS
Figure 16a. Capacitor Parasitics
Affecting Transient Recovery
AROUND
Figure 16b. Transient Recovery Curves
1702fa
29
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