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参数资料
| 型号： | LTC1702IGN#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 17/36页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 24-SSOP |
| 标准包装： | 2,500 |
| 系列： | PolyPhase® |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 750kHz |
| 占空比： | 93% |
| 电源电压： | 3 V ~ 7 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
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LTC1702
APPLICATIO N S I N FOR M ATIO N
QB). This capacitance is composed of MOSFET channel
charge, actual parasitic drain-source capacitance and
Miller-multiplied gate-drain capacitance, but can be ap-
proximated as a single capacitance from gate to source.
Regardless of where the charge is going, the fact remains
that it all has to come out of V CC to turn the MOSFET gate
on, and when the MOSFET is turned back off, that charge
allendsupatground.Inthemeanwhile,ittravelsthrough
the LTC1702’s gate drivers, heating them up. More power
lost!
In this case, the power is lost in little bite-sized chunks, one
chunk per switch per cycle, with the size of the chunk set
by the gate charge of the MOSFET. Every time the MOSFET
switches, another chunk is lost. Clearly, the faster the
clock runs, the more important gate charge becomes as a
loss term. Old-fashioned switchers that ran at 20kHz could
pretty much ignore gate charge as a loss term; in the
550kHz LTC1702, gate charge loss can be a significant
efficiency penalty. Gate charge loss can be the dominant
loss term at medium load currents, especially with large
MOSFETs. Gate charge loss is also the primary cause of
power dissipation in the LTC1702 itself.
TG Charge Pump
There’s another nuance of MOSFET drive that the LTC1702
needs to get around. The LTC1702 is designed to use
N-channel MOSFETs for both QT and QB, primarily
because N-channel MOSFETs generally cost less and have
lower R DS(ON) than similar P-channel MOSFETs. Turning
QB on is no big deal since the source of QB is attached to
PGND; the LTC1702 just switches the BG pin between
PGND and V CC . Driving QT is another matter. The source
of QT is connected to SW which rises to V CC when QT is
on. To keep QT on, the LTC1702 must get TG one MOSFET
V GS(ON) above V CC . It does this by utilizing a floating driver
with the negative lead of the driver attached to SW (the
source of QT) and the V CC lead of the driver coming out
separately at BOOST. An external 1 μ F capacitor C CP con-
nected between SW and BOOST (Figure 2) supplies power
to BOOST when SW is high, and recharges itself through
D CP when SW is low. This simple charge pump keeps the
TG driver alive even as it swings well above V CC . The value
of the bootstrap capacitor C CP needs to be at least 100
times that of the total input capacitance of the topside
MOSFET(s). For very large external MOSFETs (or multiple
MOSFETs in parallel), C CP may need to be increased over
the 1 μ F value.
INPUT SUPPLY
The BiCMOS process that allows the LTC1702 to include
large MOSFET drivers on-chip also limits the maximum
input voltage to 7V. This limits the practical maximum
input supply to a loosely regulated 5V or 6V rail. The
LTC1702 will operate properly with input supplies down to
about 3V, so a typical 3.3V supply can also be used if the
external MOSFETs are chosen appropriately (see the Power
MOSFETs section).
At the same time, the input supply needs to supply several
amps of current without excessive voltage drop. The input
supply must have regulation adequate to prevent sudden
load changes from causing the LTC1702 input voltage to
dip. In most typical applications where the LTC1702 is
generating a secondary low voltage logic supply, all of
these input conditions are met by the main system logic
supply when fortified with an input bypass capacitor.
Input Bypass
A typical LTC1702 circuit running from a 5V logic supply
might provide 1.6V at 10A at one of its outputs. 5V to 1.6V
implies a duty cycle of 32%, which means QT is on 32%
of each switching cycle. During QT’s on-time, the current
drawn from the input equals the load current and during
the rest of the cycle, the current drawn from the input is
near zero. This 0A to 10A, 32% duty cycle pulse train adds
up to 4.7A RMS at the input. At 550kHz, switching cycles
last about 1.8 μ s —most system logic supplies have no
hope of regulating output current with that kind of speed.
A local input bypass capacitor is required to make up the
difference and prevent the input supply from dropping
drastically when QT kicks on. This capacitor is usually
chosen for RMS ripple current capability and ESR as well
as value.
The input bypass capacitor in an LTC1702 circuit is
common to both channels. Consider our 10A example
case with the other side of the LTC1702 disabled. The input
1702fa
17
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