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| 型号： | LTC1709EG-8 |
| 厂商： | Linear Technology |
| 文件页数： | 20/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 36-SSOP |
| 标准包装： | 37 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 360kHz |
| 占空比： | 99.5% |
| 电源电压： | 4 V ~ 36 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 36-SSOP（0.209"，5.30mm 宽） |
| 包装： | 管件 |
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LTC1709-8/LTC1709-9
APPLICATIO S I FOR ATIO
The loop filter components (C LP , R LP ) smooth out the
current pulses from the phase detector and provide a
stable input to the voltage controlled oscillator. The filter
components C LP and R LP determine how fast the loop
acquires lock. Typically R LP =10k and C LP is 0.01 μ F to
0.1 μ F.
Minimum On-Time Considerations
Minimum on-time, t ON(MIN) , is the smallest time duration
that the LTC1709 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty cycle
applications may approach this minimum on-time limit
and care should be taken to ensure that:
is reduced depending upon the maximum load step speci-
fications. Voltage positioning can easily be added to the
LTC1709 by loading the I TH pin with a resistive divider
having a Thevenin equivalent voltage source equal to the
midpoint operating voltage of the error amplifier, or 1.2V
(see Figure 8).
The resistive load reduces the DC loop gain while main-
taining the linear control range of the error amplifier. The
worst-case peak-to-peak output voltage deviation due to
transient loading can theoretically be reduced to half or
alternatively the amount of output capacitance can be
reduced for a particular application. A complete explana-
tion is included in Design Solutions 10 or the LTC1736
data sheet. (See www.linear-tech.com)
()
t ON ( MIN ) <
V OUT
V IN f
INTV CC
R T2
If the duty cycle falls below what can be accommodated by
I TH
the minimum on-time, the LTC1709 will begin to skip
R T1
R C
LTC1709
cycles resulting in variable frequency operation. The out-
put voltage will continue to be regulated, but the ripple
current and ripple voltage will increase.
The minimum on-time for the LTC1709 is generally less
than 200ns. However, as the peak sense voltage de-
creases, the minimum on-time gradually increases. This is
of particular concern in forced continuous applications
with low ripple current at light loads. If the duty cycle drops
below the minimum on-time limit in this situation, a
significant amount of cycle skipping can occur with corre-
spondingly larger ripple current and voltage ripple.
If an application can operate close to the minimum
on-time limit, an inductor must be chosen that has a low
enough inductance to provide sufficient ripple amplitude
to meet the minimum on-time requirement. As a general
rule, keep the inductor ripple current of each phase equal
to or greater than 15% of I OUT(MAX) at V IN(MAX) .
Voltage Positioning
Voltage positioning can be used to minimize peak-to-peak
output voltage excursion under worst-case transient load-
ing conditions. The open-loop DC gain of the control loop
20
C C
1709 F08
Figure 8. Active Voltage Positioning Applied to the LTC1709
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1709 circuits: 1) I 2 R losses, 2) Topside
MOSFET transition losses, 3) INTV CC regulator current
and 4) LTC1709 V IN current (including loading on the
differential amplifier output).
相关PDF资料 |
PDF描述 |
|---|---|
| LTC1709EG-9#PBF | IC REG CTRLR BUCK PWM CM 36-SSOP |
| LTC1709EG-9 | IC REG CTRLR BUCK PWM CM 36-SSOP |
| LTC1775CS#TRPBF | IC REG CTRLR BUCK PWM CM 16-SOIC |
| LTC1775CS#TR | IC REG CTRLR BUCK PWM CM 16-SOIC |
| H4BBT-10112-G1-ND | JUMPER-H9992TR/A3047G/H9992TR12" |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC1709EG-8#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 36-SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,000 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:1MHz 占空比:50% 电源电压:9 V ~ 10 V 降压:无 升压:是 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:8-TSSOP（0.173"，4.40mm 宽） 包装:带卷 (TR) |
| LTC1709EG-8#TR | 功能描述:IC REG CTRLR BUCK PWM CM 36-SSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC1709EG-8#TRPBF | 功能描述:IC REG CTRLR BUCK PWM CM 36-SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC1709EG-85 | 功能描述:IC REG CTRLR BUCK PWM CM 36-SSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC1709EG-85#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 36-SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
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