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参数资料
| 型号： | LTC1772ES6#TR |
| 厂商： | Linear Technology |
| 文件页数： | 10/12页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM SOT23-6 |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 650kHz |
| 占空比： | 100% |
| 电源电压： | 2.5 V ~ 9.8 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | SOT-23-6 细型，TSOT-23-6 |
| 包装： | 带卷 (TR) |
LTC1772
APPLICATIO N S I N FOR M ATIO N
0.4V, the loss increases from 0.5% to 8% as the load
current increases from 0.5A to 2A.
5. Transition losses apply to the external MOSFET and
increase at higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2(V IN ) 2 I O(MAX) C RSS (f)
Other losses including C IN and C OUT ESR dissipative
losses, and inductor core losses, generally account for
less than 2% total additional loss.
Foldback Current Limiting
As described in the Output Diode Selection, the worst-case
dissipation occurs with a short-circuited output when the
diode conducts the current limit value almost continu-
ously. To prevent excessive heating in the diode, foldback
current limiting can be added to reduce the current in
proportion to the severity of the fault.
Foldback current limiting is implemented by adding diodes
D FB1 and D FB2 between the output and the I TH /RUN pin as
shown in Figure 5. In a hard short (V OUT = 0V), the current
will be reduced to approximately 50% of the maximum
output current.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1772. These items are illustrated graphically in the
layout diagram in Figure 6. Check the following in your
layout:
1. Is the Schottky diode closely connected between ground
(Pin 2) and drain of the external MOSFET?
2. Does the (+) plate of C IN connect to the sense resistor
as closely as possible? This capacitor provides AC
current to the MOSFET.
3. Is the input decoupling capacitor (0.1 μ F) connected
closely between V IN (Pin 5) and ground (Pin 2)?
4. Connect the end of R SENSE as close to V IN (Pin 5) as
possible. The V IN pin is the SENSE + of the current
comparator.
5. Is the trace from SENSE – (Pin 4) to the Sense resistor
kept short? Does the trace connect close to R SENSE ?
LTC1772
I TH /RUN V FB
R2
+
D FB1
V OUT
6. Keep the switching node PGATE away from sensitive
small signal nodes.
R1
D FB2
1772 F05
7. Does the V FB pin connect directly to the feedback
resistors? The resistive divider R1 and R2 must be
connected between the (+) plate of C OUT and signal
ground.
Figure 5. Foldback Current Limiting
1
I TH /RUN PGATE
6
+
C IN
V IN
R ITH
C ITH
2
3
LTC1772
GND V IN
V FB SENSE –
5
4
R SENSE
0.1 μ F
M1
D1
L1
+
C OUT
V OUT
R1
R2
BOLD LINES INDICATE HIGH CURRENT PATHS
1772 F06
Figure 6. LTC1772 Layout Diagram (See PC Board Layout Checklist)
1772fb
10
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC1772HS6#TRMPBF | 功能描述:IC REG CTRLR BUCK PWM CM SOT23-6 RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| LTC1772HS6#TRPBF | 功能描述:IC REG CTRLR BUCK PWM CM SOT23-6 RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| LTC1772IS6 | 制造商:Linear Technology 功能描述:DC DC Cntrlr Single-OUT Step Down 2.5V to 9.8V Input 6-Pin TSOT-23 |
| LTC1772IS6#PBF | 制造商:Linear Technology 功能描述:DC DC Cntrlr Single-OUT Step Down 2.5V to 9.8V Input 6-Pin TSOT-23 |
| LTC1772IS6#TR | 功能描述:IC REG CTRLR BUCK PWM CM SOT23-6 RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
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