参数资料
型号: LTC1844ES5-2.8#TRMPBF
厂商: Linear Technology
文件页数: 8/12页
文件大小: 0K
描述: IC REG LDO 2.8V .15A TSOT23-5
产品培训模块: More Information on LDOs
标准包装: 1
稳压器拓扑结构: 正,固定式
输出电压: 2.8V
输入电压: 最高 6.5V
电压 - 压降(标准): 0.105V @ 150mA
稳压器数量: 1
电流 - 输出: 150mA(最小值)
电流 - 限制(最小): 160mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SOT-23-5 细型,TSOT-23-5
供应商设备封装: TSOT-23-5
包装: 剪切带 (CT)
其它名称: LTC1844ES5-2.8#TRMPBFCT
LTC1844 Series
APPLICATIO S I FOR ATIO
output current change of 1mA to 100mA is – 4mV typical
at V OUT = 1.25V. At V OUT = 5V, load regulation is:
(5V/1.25V)(– 4mV) = –16mV
Because the ADJ pin is relatively high impedance (depend-
ing on the resistor divider used), stray capacitance at this
pin can introduce significant phase shift in the error
amplifier loop. The PCB layout should be designed to
absolutely minimize the capacitance seen at the ADJ pin.
To ensure stability over all operating conditions when
utilizing large divider resistors, a small feedforward ca-
pacitor ( ≈ 1000pF) in parallel with the upper divider resis-
tor (C FF in Figure 2) is recommended. As an added bonus,
this capacitor will improve transient response.
Bypass Capacitance and Low Noise Performance
A bypass capacitor can optionally be connected from the
BYP pin to ground to lower output voltage noise. A good
quality low leakage capacitor is recommended. This ca-
pacitor will bypass the input of the error amplifier, provid-
ing a low frequency noise pole. The noise pole provided by
this bypass capacitor will lower the output voltage noise to
as low as 30 μ V RMS with the addition of a 0.1 μ F capacitor.
Initial regulator power-up time is inversely proportional to
the size of the bypass capacitor, slowing to 10ms with a
0.1 μ F bypass capacitor and 10 μ F output capacitor. How-
ever, the LTC1844 does not discharge the bypass capaci-
tor when put into shutdown and thus the shutdown exit
delay can be much shorter ( ≈ 70 μ s) than initial power-up
time if the shutdown duration is brief (<10ms). The
maximum shutdown duration required to allow fast shut-
down exit is determined by the capacitor leakage current,
thus a low leakage bypass capacitor is recommended.
Output Capacitance and Transient Response
The LTC1844 regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small capaci-
tors. A minimum output capacitor of 1 μ F with an ESR of
0.3 ? or less is recommended to ensure stability. The
LTC1844 is a micropower device and output transient
response will be a function of output capacitance. Larger
values of output capacitance decrease the peak deviations
and provide improved transient response for larger load
current changes. Note that bypass capacitors used to
decouple individual components powered by the LTC1844
will increase the effective output capacitor value. The
shaded region of Figure 3 defines the region over which
the LTC1844 regulators are stable. The maximum ESR
allowed is 0.3 ? . High ESR tantalum and electrolytic ca-
pacitors may be used, but a low ESR ceramic capacitor
must be in parallel at the output. There is no minimum ESR
requirement.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
0.40
0.35
0.30
0.25
0.20
STABLE REGION
0.15
0.10
0.05
0
0.33
1 3.3 10 33
100
OUTPUT CAPACITANCE ( μ F)
1844 F03
Figure 3. Stability
1844fa
8
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