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参数资料
| 型号： | LTC2145IUP-14#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 18/38页 |
| 文件大小： | 0K |
| 描述： | IC ADC DUAL 14BIT 125MSPS 64-QFN |
| 标准包装： | 40 |
| 位数： | 14 |
| 采样率（每秒）： | 125M |
| 数据接口： | 并联，串行，SPI |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 360mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-WFQFN 裸露焊盘 |
| 供应商设备封装： | 64-QFN（9x9） |
| 包装： | 管件 |
| 输入数目和类型： | 2 个差分 |
| 配用： | DC890B-ND - BOARD USB DATA COLLECTION |
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25
21454314fa
LTC2145-14/
LTC2144-14/LTC2143-14
APPLICATIONS INFORMATION
Phase Shifting the Output Clock
In full rate CMOS mode the data output bits normally
change at the same time as the falling edge of CLKOUT+,
so the rising edge of CLKOUT+ can be used to latch the
output data. In double data rate CMOS and LVDS modes
the data output bits normally change at the same time as
the falling and rising edges of CLKOUT+. To allow adequate
set-up and hold time when latching the data, the CLKOUT+
signal may need to be phase shifted relative to the data
output bits. Most FPGAs have this feature; this is generally
the best place to adjust the timing.
The LTC2145-14/LTC2144-14/LTC2143-14 can also phase
shift the CLKOUT+/CLKOUT– signals by serially program-
ming mode control register A2. The output clock can be
shifted by 0°, 45°, 90°, or 135°. To use the phase shift-
ing feature the clock duty cycle stabilizer must be turned
on. Another control register bit can invert the polarity of
CLKOUT+ and CLKOUT–, independently of the phase shift.
The combination of these two features enables phase shifts
of 45° up to 315° (Figure 14).
DATA FORMAT
Table 1 shows the relationship between the analog input
voltage, the digital data output bits and the overflow bit.
By default the output data format is offset binary. The 2’s
complement format can be selected by serially program-
ming mode control register A4.
Table 1. Output Codes vs Input Voltage
AIN+ – AIN–
(2V Range)
OF
D13-D0
(OFFSET BINARY)
D13-D0
(2’s COMPLEMENT)
>1.000000V
+0.999878V
+0.999756V
1
0
11 1111 1111 1111
11 1111 1111 1110
01 1111 1111 1111
01 1111 1111 1110
+0.000122V
+0.000000V
–0.000122V
–0.000244V
0
10 0000 0000 0001
10 0000 0000 0000
01 1111 1111 1111
01 1111 1111 1110
00 0000 0000 0001
00 0000 0000 0000
11 1111 1111 1111
11 1111 1111 1110
–0.999878V
–1.000000V
≤–1.000000V
0
1
00 0000 0000 0001
00 0000 0000 0000
10 0000 0000 0001
10 0000 0000 0000
CLKOUT+
D0-D13, OF
PHASE
SHIFT
0°
45°
90°
135°
180°
225°
270°
315°
CLKINV
0
1
CLKPHASE1
MODE CONTROL BITS
0
1
0
1
CLKPHASE0
0
1
0
1
0
1
0
1
21454314 F14
ENC+
Figure 14. Phase Shifting CLKOUT
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC2150-14 | 制造商:LINER 制造商全称:Linear Technology 功能描述:300MHz Digital Predistortion Receiver |
| LTC2150CUJ-12#PBF | 制造商:Linear Technology 功能描述:IC ADC 12BIT 170MSPS 40QFN 制造商:Linear Technology 功能描述:ADC 12BIT 170MSPS SPI QFN-40 制造商:Linear Technology 功能描述:ADC, 12BIT, 170MSPS, SPI, QFN-40 制造商:Linear Technology 功能描述:ADC, 12BIT, 170MSPS, SPI, QFN-40, Resolution (Bits):12bit, Sampling Rate:170MSPS, Supply Voltage Type:Single, Supply Voltage Min:1.7V, Supply Voltage Max:1.9V, Supply Current:145mA, Digital IC Case Style:QFN, No. of Pins:40 , RoHS Compliant: Yes 制造商:Linear Technology 功能描述:MS-ADC/High Speed, 12-bit, 170Msps, 1.8V ADC, DDR LVDS Outputs |
| LTC2150CUJ-12#TRPBF | 制造商:Linear Technology 功能描述:IC ADC 12BIT 170MSPS 40QFN |
| LTC2150CUJ-14 | 制造商:Linear Technology 功能描述:ADC DUAL 14BIT 170MSPS 40QFN 制造商:Linear Technology 功能描述:ADC, DUAL, 14BIT, 170MSPS, 40QFN |
| LTC2150CUJ-14#PBF | 制造商:Linear Technology 功能描述:IC ADC DUAL 14BIT 170MSPS 40-QFN |
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