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参数资料
| 型号： | LTC2251CUH#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 2/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10-BIT 125MSPS 3V 32-QFN |
| 标准包装： | 73 |
| 位数： | 10 |
| 采样率（每秒）： | 125M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 468mW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，双极; 1 个差分，双极 |
| 产品目录页面： | 1349 (CN2011-ZH PDF) |
LTC2251/LTC2250
10
22510fa
UU
U
PI FU CTIO S
AIN+ (Pin 1): Positive Differential Analog Input.
AIN- (Pin 2): Negative Differential Analog Input.
REFH (Pins 3, 4): ADC High Reference. Short together and
bypass to pins 5, 6 with a 0.1
F ceramic chip capacitor as
close to the pin as possible. Also bypass to pins 5, 6 with
an additional 2.2
F ceramic chip capacitor and to ground
with a 1
F ceramic chip capacitor.
REFL (Pins 5, 6): ADC Low Reference. Short together and
bypass to pins 3, 4 with a 0.1
F ceramic chip capacitor as
close to the pin as possible. Also bypass to pins 3, 4 with
an additional 2.2
F ceramic chip capacitor and to ground
with a 1
F ceramic chip capacitor.
VDD (Pins 7, 32): 3V Supply. Bypass to GND with 0.1F
ceramic chip capacitors.
GND (Pin 8): ADC Power Ground.
CLK (Pin 9): Clock Input. The input sample starts on the
positive edge.
SHDN (Pin 10): Shutdown Mode Selection Pin. Connect-
ing SHDN to GND and OE to GND results in normal
operation with the outputs enabled. Connecting SHDN to
GND and OE to VDD results in normal operation with the
outputs at high impedance. Connecting SHDN to VDD and
OE to GND results in nap mode with the outputs at high
impedance. Connecting SHDN to VDD and OE to VDD
results in sleep mode with the outputs at high impedance.
OE (Pin 11): Output Enable Pin. Refer to SHDN pin
function.
NC (Pins 12, 13, 14, 15): Do Not Connect These Pins.
D0-D9 (Pins 16, 17, 18, 19, 22, 23, 24, 25, 26, 27):
Digital Outputs. D9 is the MSB.
OGND (Pin 20): Output Driver Ground.
OVDD (Pin 21): Positive Supply for the Output Drivers.
Bypass to ground with 0.1
Fceramicchipcapacitor.OVDD
can be set from 0.5V to 3.6V.
OF (Pin 28): Over/Under Flow Output. High when an over
or under flow has occurred.
MODE (Pin 29): Output Format and Clock Duty Cycle
Stabilizer Selection Pin. Connecting MODE to GND selects
offset binary output format and turns the clock duty cycle
stabilizer off. 1/3 VDD selects offset binary output format
and turns the clock duty cycle stabilizer on. 2/3 VDD selects
2’s complement output format and turns the clock duty
cycle stabilizer on. VDD selects 2’s complement output
format and turns the clock duty cycle stabilizer off.
SENSE (Pin 30): Reference Programming Pin. Connecting
SENSE to VCM selects the internal reference and a ±0.5V
input range. VDD selects the internal reference and a ±1V
input range. An external reference greater than 0.5V and
less than 1V applied to SENSE selects an input range of
±VSENSE. ±1V is the largest valid input range.
VCM (Pin 31): 1.5V Output and Input Common Mode Bias.
Bypass to ground with 2.2
F ceramic chip capacitor.
GND (Exposed Pad) (Pin 33): ADC Power Ground. The
exposed pad on the bottom of the package must be
soldered to ground.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC2251IUH | 制造商:LINER 制造商全称:Linear Technology 功能描述:10-Bit, 125/105Msps Low Noise 3V ADCs |
| LTC2251IUH#PBF | 功能描述:IC ADC 10-BIT 125MSPS 3V 32-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| LTC2251IUH#TRPBF | 功能描述:IC ADC 10BIT 125MSPS 3V 32-QFN RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
| LTC2252 | 制造商:LINER 制造商全称:Linear Technology 功能描述:14-Bit, 125/105Msps Low Power 3V ADCs |
| LTC2252CUH | 制造商:Linear Technology 功能描述:Single ADC Pipelined 105Msps 12-bit Parallel 32-Pin QFN EP |
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