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参数资料
| 型号： | LTC2499IUHF#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 3/34页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT DELTA SIG 38-QFN |
| 标准包装： | 52 |
| 位数： | 24 |
| 采样率（每秒）： | 7.5 |
| 数据接口： | I²C，串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 480µW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 38-WFQFN 裸露焊盘 |
| 供应商设备封装： | 38-QFN（5x7） |
| 包装： | 管件 |
| 输入数目和类型： | 16 个单端，双极；8 个差分，双极 |
| 产品目录页面： | 1348 (CN2011-ZH PDF) |
| 配用： | DC1012A-A-ND - BOARD DELTA SIGMA ADC LTC2499 |
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LTC2499
2499fd
GND (Pins 1, 4, 6, 31, 32, 33, 34): Ground. Multiple
groundpinsinternallyconnectedforoptimumgroundcur-
rent flow and VCC decoupling. Connect each one of these
pins to a common ground plane through a low impedance
connection. All seven pins must be connected to ground
for proper operation.
SCL (Pin 2): Serial Clock Pin of the I2C Interface. The
LTC2499 can only act as a slave and the SCL pin only ac-
cepts an external serial clock. Data is shifted into the SDA
pinontherisingedgesoftheSCLclockandoutputthrough
the SDA pin on the falling edges of the SCL clock.
SDA (Pin 3): Bidirectional Serial Data Line of the I2C Inter-
face. In the transmitter mode (read), the conversion result
is output through the SDA pin, while in the receiver mode
(write), the device channel select and configuration bits
are input through the SDA pin. The pin is high impedance
during the data input mode and is an open drain output
(requires an appropriate pull-up device to VCC) during the
data output mode.
NC (Pin 5): No Connect. This pin can be left floating or
tied to GND.
COM (Pin 7): The Common Negative Input (IN–) for All
Single-Ended Multiplexer Configurations. The voltage on
CH0-CH15 and COM pins can have any value between
GND – 0.3V to VCC + 0.3V. Within these limits, the two
selected inputs (IN+ and IN– ) provide a bipolar input range
(VIN = IN+ – IN– ) from –0.5 VREF to 0.5 VREF. Outside
this input range, the converter produces unique overrange
and underrange output codes.
CH0 to CH15 (Pin 8-Pin 23): Analog Inputs. May be pro-
grammed for single-ended or differential mode.
MUXOUTP (Pin 24): Positive Multiplexer Output. Connect
to the input of external buffer/amplifier or short directly
to ADCINP.
ADCINP (Pin 25): Positive ADC Input. Connect to the
output of a buffer/amplifier driven by MUXOUTP or short
directly to MUXOUTP.
ADCINN (Pin 26): Negative ADC Input. Connect to the
output of a buffer/amplifier driven by MUXOUTN or short
directly to MUXOUTN
MUXOUTN (Pin 27): Negative Multiplexer Output. Con-
nect to the input of an external buffer/amplifier or short
directly to ADCINN.
VCC(Pin28):PositiveSupplyVoltage.BypasstoGNDwith
a 10F tantalum capacitor in parallel with a 0.1F ceramic
capacitor as close to the part as possible.
REF+, REF– (Pin 29, Pin 30): Differential Reference Input.
The voltage on these pins can have any value between
GND and VCC as long as the reference positive input, REF+,
remains more positive than the negative reference input,
REF–, by at least 0.1V. The differential voltage (VREF = REF+
– REF–) sets the full-scale range for all input channels.
When performing an on-chip measurement, the minimum
value of REF = 2V.
fO (Pin 35): Frequency Control Pin. Digital input that
controls the internal conversion clock rate. When fO is
connected to GND, the converter uses its internal oscil-
lator running at 307.2kHz. The conversion clock may also
be overridden by driving the fO pin with an external clock
in order to change the output rate and the digital filter
rejection null.
CA0, CA1, CA2 (Pins 36, 37, 38): Chip Address Control
Pins. These pins are configured as a three-state (LOW,
HIGH, floating) address control bits for the device I2C
address.
Exposed Pad (Pin 39): Ground. This pin is ground and
mustbesolderedtothePCBgroundplane.Forprototyping
purposes, this pin may remain floating.
pin Functions
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