参数资料
型号: LTC2499IUHF#PBF
厂商: Linear Technology
文件页数: 9/34页
文件大小: 0K
描述: IC ADC 24BIT DELTA SIG 38-QFN
标准包装: 52
位数: 24
采样率(每秒): 7.5
数据接口: I²C,串行
转换器数目: 1
功率耗散(最大): 480µW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 38-WFQFN 裸露焊盘
供应商设备封装: 38-QFN(5x7)
包装: 管件
输入数目和类型: 16 个单端,双极;8 个差分,双极
产品目录页面: 1348 (CN2011-ZH PDF)
配用: DC1012A-A-ND - BOARD DELTA SIGMA ADC LTC2499
LTC2499
2499fd
Table 2. LTC2499 Status Bits
INPUT RANGE
BIT 31
SIG
BIT 30
MSB
VIN ≥ FS
1
0V ≤ VIN < FS
1/0
0
–FS ≤ VIN < 0V
0
1
VIN < –FS
0
INPUT DATA FORMAT
The serial input word to the LTC2499 is 13 bits long and
is written into the device input register in two 8-bit words.
The first word (SGL, ODD, A2, A1, A0) is used to select
the input channel. The second word of data (IM, FA, FB,
SPD)isusedtoselectthefrequencyrejection,speedmode
(1x, 2x), and temperature measurement.
After power-up, the device initiates an internal reset cycle
which sets the input channel to CH0-CH1 (IN+ = CH0, IN=
CH1),thefrequencyrejectiontosimultaneous50Hz/60Hz,
and 1x output rate (auto-calibration enabled). The first
conversion automatically begins at power-up using this
default configuration. Once the conversion is complete,
up to two words may be written into the device.
The first three bits of the first input word consist of two
preamble bits and one enable bit. Valid settings for these
three bits are 000, 100, and 101. Other combinations
should be avoided.
If the first three bits are 000 or 100, the following data
is ignored (don’t care) and the previously selected input
channel remains valid for the next conversion
If the first three bits shifted into the device are 101, then
the next five bits select the input channel for the next
conversion cycle (see Table 3).
The first input bit (SGL) following the 101 sequence de-
termines if the input selection is differential (SGL = 0) or
single-ended (SGL = 1). For SGL = 0, two adjacent chan-
Figure 3a. Timing Diagram for Reading from the LTC2499
applications inForMation
Figure 3b. Timing Diagram for Writing to the LTC2499
SLEEP
DATA OUTPUT
ACK BY
LTC2499
ACK BY
MASTER
SUB LSBs
START BY
MASTER
NACK BY
MASTER
LSB
R
MSB
SGN
DIS
7
8
9
1
2
9
1
2
3
4
5
6
7
8
9
1
7-BIT
ADDRESS
2499 F03a
SLEEP
DATA INPUT
ACK BY
LTC2499
ACK
LTC2499
ACK
LTC2499
(OPTIONAL 2ND BYTE)
START BY
MASTER
SGL ODD
W
0
1
SCL
SDA
EN
A2
A1
A0
7
8
9
1
2
9
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
9
1
7-BIT ADDRESS
2499 F03b
IM
FA
EN2
FB
SPD
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