参数资料
型号: LTC2642CDD-12#TRPBF
厂商: Linear Technology
文件页数: 24/24页
文件大小: 0K
描述: IC DAC 12BIT VOUT 10-DFN
标准包装: 2,500
设置时间: 1µs
位数: 12
数据接口: 串行
转换器数目: 1
电压电源: 单电源
功率耗散(最大): 600µW
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
供应商设备封装: 10-DFN(3x3)
包装: 带卷 (TR)
输出数目和类型: 1 电压,单极;1 电压,双极
采样率(每秒): *
LTC2641/LTC2642
9
26412fc
For more information www.linear.com/LTC2641
pin FuncTions
LTC2641 – MSOP, DFN Packages
REF (Pin 1): Reference Voltage Input. Apply an external
reference at REF between 2V and VDD.
CS (Pin 2): Serial Interface Chip Select/Load Input. When
CS is low, SCLK is enabled for shifting in data on DIN.
When CS is taken high, SCLK is disabled, the 16-bit input
word is latched and the DAC is updated.
SCLK (Pin 3): Serial Interface Clock Input. CMOS and
TTL compatible.
DIN (Pin 4): Serial Interface Data Input. Data is applied
to DIN for transfer to the device at the rising edge of
SCLK.
CLR (Pin 5): Asynchronous Clear Input. A logic low clears
the DAC to code 0.
VOUT (Pin 6): DAC Output Voltage. The output range is
0V to VREF.
VDD (Pin 7): Supply Voltage. Set between 2.7V and
5.5V.
GND (Pin 8): Circuit Ground.
Exposed Pad (DFN Pin 9): Circuit Ground. Must be sol-
dered to PCB ground.
LTC2641 – SO Package OBSOLETE
VOUT (Pin 1): DAC Output Voltage. The output range is
0V to VREF.
GND (Pin 2): Circuit Ground.
REF (Pin 3): Reference Voltage Input. Apply an external
reference at REF between 2V and VDD.
CS (Pin 4): Serial Interface Chip Select/Load Input. When
CS is low, SCLK is enabled for shifting in data on DIN.
When CS is taken high, SCLK is disabled, the 16-bit input
word is latched and the DAC is updated.
SCLK (Pin 5): Serial Interface Clock Input. CMOS and
TTL compatible.
DIN (Pin 6): Serial Interface Data Input. Data is applied
to DIN for transfer to the device at the rising edge of
SCLK.
GND (Pin 7): Circuit Ground Pin. Must be connected to
Pin 2 (GND).
VDD (Pin 8): Supply Voltage. Set between 2.7V and
5.5V.
LTC2642 – MSOP, DFN Packages
REF (Pin 1): Reference Voltage Input. Apply an external
reference at REF between 2V and VDD.
CS (Pin 2): Serial Interface Chip Select/Load Input. When
CS is low, SCLK is enabled for shifting in data on DIN.
When CS is taken high, SCLK is disabled, the 16-bit input
word is latched and the DAC is updated.
SCLK (Pin 3): Serial Interface Clock Input. CMOS and
TTL compatible.
DIN (Pin 4): Serial Interface Data Input. Data is applied
to DIN for transfer to the device at the rising edge of
SCLK.
CLR (Pin 5): Asynchronous Clear Input. A logic low clears
the DAC to midscale.
VOUT (Pin 6): DAC Output Voltage. The output range is
0V to VREF.
INV (Pin 7): Center Tap of Internal Scaling Resistors. Con-
nect to an external amplifier’s inverting input in bipolar
mode.
RFB (Pin 8): Feedback Resistor. Connect to an external
amplifier’s output in bipolar mode. The bipolar output
range is –VREF to VREF.
VDD (Pin 9): Supply Voltage. Set between 2.7V and
5.5V.
GND (Pin 10): Circuit Ground.
Exposed Pad (DFN Pin 11): Circuit Ground. Must be
soldered to PCB ground.
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