参数资料
型号: LTC3403EDD#TRPBF
厂商: Linear Technology
文件页数: 14/16页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 0.6A 8DFN
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.3 V ~ 3.5 V
输入电压: 2.5 V ~ 5 V
PWM 型: 电流模式,混合
频率 - 开关: 1.5MHz
电流 - 输出: 600mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-WFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 8-DFN-EP(3x3)
LTC3403
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3403. These items are also illustrated graphically in
maximum of 0.6A but most of the time it will be in standby
mode, requiring only 2mA. Efficiency at both low and high
load currents is important. Output voltage is 2.5V. With
this information we can calculate L using Equation (1),
V OUT ? 1 – OUT ?
Figures 6 and 7. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the V IN trace should be kept short, direct and
L =
1
( f )( ? I L )
? V ?
? V IN ?
(2)
wide.
2. Does the (+) plate of C IN connect to V IN as closely as
possible? This capacitor provides the AC drive to the
Substituting V OUT = 2.5V, V IN = 4.2V, I L = 240mA and
f = 1.5MHz in Equation (2) gives:
1 . 5 MHz ( 240 mA ) ?
? = 2 . 81 μ H
internal power MOSFETs.
3. Keep the (–) plates of C IN and C OUT as close as possible.
L =
2 . 5 V ?
?
1 –
2 . 5 V ?
4 . 2 V ?
Design Example
As a design example, assume the LTC3403 is used in a
single lithium-ion battery-powered cellular phone applica-
tion. The V IN will be operating from a maximum of 4.2V
down to about 2.7V. The load current requirement is a
A 2.2 μ H inductor works well for this application. For best
efficiency choose a 720mA or greater inductor with less
than 0.2 ? series resistance.
C IN will require an RMS current rating of at least 0.3A ?
LOAD(MAX)/2 at temperature and C OUT will require an
ESR of less than 0.25 ? . In most cases, a ceramic capaci-
TO DAC
R REF
VIA TO REF
tor will satisfy this requirement.
C OUT
C IN
GDR
V IN
GND
SW
1
2
3
4
LTC3403
8
7
6
5
V OUT
REF
MODE
RUN
C REF
V IN
2.7V
TO 5V
C IN?
10 μ F
2
6
LTC3403
V IN SW
MODE GDR
4
1
2.2 μ H*
V OUT
C OUT**
4.7 μ F
CER
5
RUN
V OUT
8
CER
L1
VIA TO GND
3403 F07
VIA TO V IN
DAC
10k
1000pF
7
REF
GND
3
* MURATA LQH32CN2R2M11
** TAIYO YUDEN JMK212BJ475MG
?
TAIYO YUDEN JMK212BJ106MN
LTC3403 F08
Figure 7. Suggested Layout
Figure 8
3403f
14
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