参数资料
型号: LTC3411IMS#TRPBF
厂商: Linear Technology
文件页数: 12/24页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 10MSOP
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 5 V
输入电压: 2.63 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 1MHz
电流 - 输出: 1.25A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 带卷 (TR)
供应商设备封装: 10-MSOP
LTC3411
APPLICATIONS INFORMATION
C OUT ≈ 2 . 5
V OUT ≈ 0 . 8 V ? 1 +
?
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now be-
coming available in smaller case sizes. These are tempting
for switching regulator use because of their very low ESR.
Unfortunately, the ESR is so low that it can cause loop
stability problems. Solid tantalum capacitor ESR generates
a loop “zero” at 5kHz to 50kHz that is instrumental in giving
acceptable loop phase margin. Ceramic capacitors remain
capacitive to beyond 300kHz and ususally resonate with
their ESL before ESR becomes effective. Also, ceramic
caps are prone to temperature effects which requires the
designer to check loop stability over the operating tem-
perature range. To minimize their large temperature and
voltage coef?cients, only X5R or X7R ceramic capacitors
should be used. A good selection of ceramic capacitors
is available from Taiyo Yuden, TDK and Murata.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the V IN pin. At best, this ringing can
couple to the output and be mistaken as loop instability.
At worst, the ringing at the input can be large enough to
damage the part.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead ful?ll a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation com-
ponents and the output capacitor size. Typically, 3 to 4
cycles are required to respond to a load step, but only in
the ?rst cycle does the output drop linearly. The output
droop, V DROOP , is usually about 2 to 3 times the linear
drop of the ?rst cycle. Thus, a good place to start is with
the output capacitor size of approximately:
Δ I OUT
f O ? V DROOP
More capacitance may be required depending on the duty
cycle and load step requirements.
In most applications, the input capacitor is merely required
to supply high frequency bypassing, since the impedance
to the supply is very low. A 10μF ceramic capacitor is
usually enough for these conditions.
Setting the Output Voltage
The LTC3411 develops a 0.8V reference voltage between
the feedback pin, V FB , and the signal ground as shown in
Figure 5. The output voltage is set by a resistive divider
according to the following formula:
? R 2 ?
? R 1 ?
Keeping the current small (<5μA) in these resistors maxi-
mizes ef?ciency, but making them too small may allow
stray capacitance to cause noise problems and reduce the
phase margin of the error amp loop.
To improve the frequency response, a feed-forward capaci-
tor C F may also be used. Great care should be taken to
route the V FB line away from noise sources, such as the
inductor or the SW line.
3411fb
12
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