参数资料
型号: LTC3411IMS#TRPBF
厂商: Linear Technology
文件页数: 15/24页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 10MSOP
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 5 V
输入电压: 2.63 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 1MHz
电流 - 输出: 1.25A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 带卷 (TR)
供应商设备封装: 10-MSOP
LTC3411
APPLICATIONS INFORMATION
In some applications, a more severe transient can be caused
by switching in loads with large (>1uF) input capacitors.
The discharged input capacitors are effectively put in paral-
lel with C OUT , causing a rapid drop in V OUT . No regulator
can deliver enough current to prevent this problem, if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the load
switch driver. A hot swap controller is designed speci?cally
for this purpose and usually incorporates current limiting,
short-circuit protection, and soft-starting.
Ef?ciency Considerations
The percent ef?ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the ef?ciency and which change would
produce the most improvement. Percent ef?ciency can
be expressed as:
%Ef?ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3411 circuits: 1) LTC3411 V IN current,
2) switching losses, 3) I 2 R losses, 4) other losses.
1) The V IN current is the DC supply current given in the
electrical characteristics which excludes MOSFET driver
and control currents. V IN current results in a small (<0.1%)
loss that increases with V IN , even at no load.
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current results
from switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from V IN to
ground. The resulting dQ/dt is a current out of V IN that is
typically much larger than the DC bias current. In continu-
ous mode, I GATECHG = f O (QT + QB), where QT and QB are
the gate charges of the internal top and bottom MOSFET
switches. The gate charge losses are proportional to V IN
and thus their effects will be more pronounced at higher
supply voltages.
3) I 2 R Losses are calculated from the DC resistances of
the internal switches, R SW , and external inductor, RL. In
continuous mode, the average output current ?owing
through inductor L is “chopped” between the internal top
and bottom switches. Thus, the series resistance look-
ing into the SW pin is a function of both top and bottom
MOSFET R DS(ON) and the duty cycle (DC) as follows:
R SW = (R DS(ON) TOP)(DC) + (R DS(ON) BOT)(1 – DC)
The R DS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteristics
curves. Thus, to obtain I 2 R losses:
I 2 R losses = I OUT2 (R SW + RL)
4) Other “hidden” losses such as copper trace and internal
battery resistances can account for additional ef?ciency
degradations in portable systems. It is very important
to include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that C IN has adequate
charge storage and very low ESR at the switching frequency.
Other losses including diode conduction losses during
dead-time and inductor core losses generally account for
less than 2% total additional loss.
Thermal Considerations
In a majority of applications, the LTC3411 does not dis-
sipate much heat due to its high ef?ciency. However, in
applications where the LTC3411 is running at high ambient
temperature with low supply voltage and high duty cycles,
such as in dropout, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately 150°C, both power
switches will be turned off and the SW node will become
high impedance.
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