参数资料
型号: LTC3417AIFE-1#TRPBF
厂商: Linear Technology
文件页数: 6/20页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ DL 20TSSOP
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.8 V ~ 5 V
输入电压: 2.25 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 1.5MHz,600kHz ~ 4MHz
电流 - 输出: 1A,1.5A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 20-TSSOP-EP
LTC3417A-1
TYPICAL PERFORMANCE CHARACTERISTICS
R DS(ON) vs V IN OUT2
Frequency vs V IN
Frequency vs Temperature
0.20
T A = 27°C
6
15
0.19
4
10
FREQ = V IN
0.18
P-CHANNEL SWITCH
2
FREQ = 143k TO GROUND
5
0
0.17
–2
0
FREQ = 143k TO GROUND
0.16
–4
FREQ = V IN
–5
–6
0.15
N-CHANNEL SWITC H
–8
–10
0.14
2
2.5
3
3.5
4
4.5
5
5.5
–10
2
2.5
3
3.5
4
4.5
5
5.5
–15
–50 –25
0
25
50
75
100
125
V IN (V)
3417A-1 G16
PIN FUNCTIONS (DFN/TSSOP)
V IN (V)
3417A-1 G17
TEMPERATURE (°C)
3417A-1 G18
RUN1 (Pin 1/Pin 2): Enable for 1.5A Regulator. When
at Logic 1, 1.5A regulator is running. When at 0V, 1.5A
regulator is off. When both RUN1 and RUN2 are at 0V, the
part is in shutdown.
V IN1 (Pin 2/Pin 3): Supply Pin for P-Channel Switch of
1.5A Regulator.
I TH1 (Pin 3/Pin 4): Error Ampli?er Compensation Point
for 1.5A Regulator. The current comparator threshold
increases with this control voltage. Nominal voltage range
for this pin is 0V to 1.5V.
V FB1 (Pin 4/Pin 5): Receives the feedback voltage from
external resistive divider across the 1.5A regulator output.
Nominal voltage for this pin is 0.8V.
V FB2 (Pin 5/Pin 6): Receives the feedback voltage from
external resistive divider across the 1A regulator output.
Nominal voltage for this pin is 0.8V.
I TH2 (Pin 6/Pin 7): Error Ampli?er Compensation Point for
1A regulator. The current comparator threshold increases
with this control voltage. Nominal voltage range for this
pin is 0V to 1.5V.
RUN2 (Pin 7/Pin 8): Enable for 1A Regulator. When at
Logic 1, 1A regulator is running. When at 0V, 1A regula-
tor is off. When both RUN1 and RUN2 are at 0V, the part
is in shutdown.
V IN2 (Pin 8/Pin 9): Supply Pin for P-Channel Switch of 1A
Regulator and Supply for Analog Circuitry.
SYNC/MODE (Pin 9/Pin 12): Combination Mode Selection
and Oscillator Synchronization Pin. This pin controls the op-
eration of the device. When the voltage on the SYNC/MODE
pin is >(V IN – 0.5V), Burst Mode operation is selected.
When the voltage on the SYNC/MODE pin is <0.5V, pulse
skipping mode is selected. When the SYNC/MODE pin is
held at V IN /2, forced continuous mode is selected. The
oscillation frequency can be synchronized to an external
oscillator applied to this pin. When synchronized to an
external clock, pulse skip mode is selected.
SW2 (Pin 10/Pin 13): Switch Node Connection to the
Inductor for the 1A Regulator. This pin swings from V IN2
to PGND2.
POR (Pin 11/Pin 14): The Power-On-Reset Pin. This
open drain-logic output is pulled to GND when the output
voltage of either regulator falls 8% below regulation and
goes high approximately 150ms after both regulators are
above –6% of regulation. If either RUN1 or RUN2 is low
(the respective regulator is in sleep mode and therefore
the output voltage is low), then POR re?ects the regulation
of the running regulator.
FREQ (Pin 12/Pin 15): Frequency Set Pin. When FREQ is
at V IN , internal oscillator runs at 1.5MHz. When a resistor
is connected from this pin to ground, the internal oscillator
frequency can be varied from 0.6MHz to 4MHz.
GNDA (Pin 13/Pin 16): Analog Ground Pin for Internal
Analog Circuitry.
3417a1fa
6
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