参数资料
型号: LTC3532EDD#TRPBF
厂商: Linear Technology
文件页数: 10/16页
文件大小: 0K
描述: IC REG BUCK BOOST SYNC ADJ 10DFN
标准包装: 2,500
类型: 降压(降压),升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 2.4 V ~ 5.25 V
输入电压: 2.4 V ~ 5.5 V
PWM 型: Burst Mode?
频率 - 开关: 300kHz ~ 2MHz
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 10-DFN(3x3)
LTC3532
OPERATIO
be minimized. Note that if the load current applied during
forced Burst Mode operation (BURST pin is grounded)
exceeds the current that can be supplied, the output voltage
will start to droop and the IC will automatically come out
of Burst Mode operation and enter ?xed frequency mode,
raising V OUT . Once regulation is achieved, the IC will then
enter Burst Mode operation once again, and the cycle will
repeat, resulting in about 4% output ripple. Note that Burst
Mode operation is inhibited during soft-start.
Burst Mode Operation to Fixed Frequency Transient
Response
In Burst Mode operation, the compensation network is
not used and V C is disconnected from the error ampli?er.
During long periods of Burst Mode operation, leakage
currents in the external components or on the PC board
could cause the compensation capacitor to charge (or
discharge), which could result in a large output transient
when returning to ?xed frequency mode of operation, even
at the same load current. To prevent this, the LTC3532
V IN
15μA
incorporates an active clamp circuit that holds the voltage
on V C at an optimal voltage during Burst Mode operation.
This minimizes any output transient when returning to
?xed frequency mode operation. For optimum transient
response, Type 3 compensation is also recommended
to broad band the control loop and roll off past the two
pole response of the output LC ?lter. (See Closing the
Feedback Loop.)
Soft-Start
The soft-start function is combined with shutdown. When
the SHDN /SS pin is brought above 1V typical, the IC is
enabled but the EA duty cycle is clamped from V C . A de-
tailed diagram of this function is shown in Figure 5. The
components R SS and C SS provide a slow ramping voltage
on SHDN /SS to provide a soft-start function. To ensure
that V C is not being clamped, SHDN /SS must be raised
above 2.4V. To enable Burst Mode operation, SHDN /SS
must be raised to within 0.5V of V IN .
ERROR AMP
+
1.22V
FB
9
V OUT
R1
TO PWM
V CI
SOFT-START
CLAMP
V C
10
C P1
R2
COMPARATORS
SHDN /SS
8
R SS
ENABLE SIGNAL
CHIP
ENABLE
+
1V
C SS
3532 F05
Figure 5. Soft-Start Circuitry
3532fc
10
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