参数资料
型号: LTC3532EDD#TRPBF
厂商: Linear Technology
文件页数: 13/16页
文件大小: 0K
描述: IC REG BUCK BOOST SYNC ADJ 10DFN
标准包装: 2,500
类型: 降压(降压),升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 2.4 V ~ 5.25 V
输入电压: 2.4 V ~ 5.5 V
PWM 型: Burst Mode?
频率 - 开关: 300kHz ~ 2MHz
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 10-DFN(3x3)
LTC3532
APPLICATIO S I FOR ATIO
The loop gain is typically rolled off before the RHP zero
frequency.
the output ?lter. Referring to Figure 8, the location of the
poles and zeros are given by:
A simple Type I compensation network can be incorpo-
rated to stabilize the loop, but at a cost of reduced band-
width and slower transient response. To ensure proper
f POLE1 ?
1
2 ? π ? 32e 3 ? R1 ? CP1
Hz
phase margin using Type I compensation, the loop must
(which is extremely close to DC)
be crossed over a decade before the LC double pole.
The unity-gain frequency of the error ampli?er with the
Type I compensation is given by:
f ZERO1 =
1
2 ? π ? R Z ? C P1
Hz
f UG =
1
2 ? π ? R1 ? C P1
Hz
f ZERO2 =
1
2 ? π ? R1 ? C Z1
Hz
referring to Figure 7.
Most applications demand an improved transient response
f POLE2 =
1
2 ? π ? R Z ? C P2
Hz
to allow a smaller output ?lter capacitor. To achieve a higher
bandwidth, Type III compensation is required, providing
two zeros to compensate for the double-pole response of
where resistance is in ohms and capacitance is in far-
ads.
V OUT
+
ERROR
AMP
1.22V
FB
9
V OUT
R1
+
ERROR
AMP
1.22V
FB
9
V C
10
R Z
C P1
R1
R2
C Z1
V C
10
C P1
R2
3532 F07
C P2
3532 F08
Figure 7. Error Ampli?er with Type l Compensation
Figure 8. Error Ampli?er with Type lll Compensation
3532fc
13
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