参数资料
型号: LTC3544BEUD#TRPBF
厂商: Linear Technology
文件页数: 13/18页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ QUAD 16QFN
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 4
输出电压: 0.8 V ~ 5.5 V
输入电压: 2.25 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 2.25MHz
电流 - 输出: 100mA,200mA(2),300mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 16-QFN-EP(3x3)
LTC3544B
APPLICATIONS INFORMATION
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C OUT , causing a rapid drop in V OUT . No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 ? C LOAD ).
Thus, a 10μF capacitor charging to 3.3V would require a
250μs rise time, limiting the charging current to about
130mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3544B. These items are also illustrated graphically in
Figures 3 and 4. Check the following in your layout:
1. The power traces, consisting of the PGND trace, the
GNDA trace, the SW traces, the PV IN trace and the V CC
trace should be kept short, direct and wide.
2. Does each of the V FBx pins connect directly to the
respective feedback resistors? The resistive dividers
must be connected between the (+) plate of the cor-
responding output filter capacitor (e.g. C13) and GNDA.
If the circuit being powered is at such a distance from
the part where voltage drops along circuit traces are
large, consider a Kelvin connection from the powered
circuit back to the resistive dividers.
3. Keep C8 and C9 as close to the part as possible.
4. Keep the switching nodes (SWx) away from the sensi-
tive V FBx nodes.
5. Keep the ground connected plates of the input and
output capacitors as close as possible.
6. Care should be taken to provide enough space between
unshielded inductors in order to minimize any trans-
former coupling.
V OUT1
L4
V CC
2.25V TO 5.5V
C8
GNDA
R15
C15
C13
R16
RUN100
SW1000
RUN100
V CC
GNDA
V FB200A
V FB200B
V FB100
RUN200A
V FB100
RUN200A
LTC3544B
V FB300
RUN300
V FB300
RUN300
V OUT3
L2
SW200A
SW200A
RUN200B
RUN200B
R5
C6
SW200B
PGND
PV IN
SW300
C4
R6
V FB200A
SW200B
C9
SW300
L1
R2
C3
V OUT4
V OUT2
C10
R8
L3
C12
V FB200B
PGND
PV IN
2.25V TO 5.5V
C1
3544B F03
R3
R11
Figure 3. LTC3544B Layout Diagram
3544bfb
  
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