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参数资料
| 型号： | LTC3552EDHC-1#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC CHARGER BATT LI-ION 16-DFN |
| 标准包装： | 2,500 |
| 功能： | 充电管理 |
| 电池化学： | 锂离子（Li-Ion） |
| 电源电压： | 4.25 V ~ 8 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFDFN 裸露焊盘 |
| 供应商设备封装： | 16-DFN（5x3） |
| 包装： | 带卷 (TR) |
LTC3552-1
OPERATIO
Thermal Limiting
An internal thermal feedback loop reduces the pro-
grammed charge current if the die temperature attempts
to rise above a preset value of approximately 120°C. This
feature protects the charger from excessive temperature
and allows the user to push the limits of the power handling
capability of a given circuit board without risk of damag-
ing the charger. The charge current can be set according
to typical (not worst case) ambient temperature with the
assurance that the charger will automatically reduce the
current in worst-case conditions. DFN package power
considerations are discussed further in the Applications
Information section.
Undervoltage Lockout (UVLO)
An internal undervoltage lockout circuit monitors the in-
put voltage and keeps the charger in shutdown mode
until V IN rises above the undervoltage lockout threshold.
The UVLO circuit has a built-in hysteresis of 200mV.
Also, to protect against reverse current in the power
MOSFET, the UVLO circuit keeps the charger in shutdown
mode if V IN falls to within 30mV of the BAT voltage. If the
UVLO comparator is tripped, the charger will not come
out of shutdown mode until V IN rises 100mV above the
BAT voltage.
Manual Shutdown
At any point in the charge cycle, the charger can be put
into shutdown mode by driving the EN pin high. This
reduces the battery drain current to less than 2μA and the
V IN supply current to less than 50μA. When in shutdown
mode, the CHRG pin is in the high impedance state. A new
charge cycle can be initiated by driving the EN pin low. An
internal resistor pull-down on this pin forces the charger
divided output voltage (V FB ) with a reference voltage of
0.6V and adjusts the peak inductor current accordingly.
Main Regulator Control Loop
During normal operation, the top power switch (P-channel
MOSFET) is turned on at the beginning of a clock cycle
when the V OUT feedback voltage is below the reference
voltage. The current ?ows into the inductor and the load in-
creases until the current limit is reached. The switch turns
off and energy stored in the inductor ?ows through the
bottom switch (N-channel MOSFET) into the load until the
next clock cycle. The peak inductor current is controlled
by the internally compensated I TH voltage, which is the
output of the error ampli?er. This ampli?er compares the
V FB to the 0.6V reference (see Block Diagram). When the
load current increases, the V FB voltage decreases slightly
below the reference. This decrease causes the error ampli-
?er to increase the I TH voltage until the average inductor
current matches the new load current. The main control
loop is shut down by pulling the RUN pin to ground.
Low Load Current Operation
When the load is relatively light, the regulator automati-
cally switches into Burst Mode operation, where the PMOS
switch operates intermittently based on load demand with
a ?xed peak inductor current. By running cycles periodi-
cally, the switching losses which are dominated by the gate
charge losses of the power MOSFETs are minimized. The
main control loop is interrupted when the output voltage
reaches the desired regulated value. A voltage comparator
trips when I TH is below 0.35V, shutting off the switch and
reducing the power. The output capacitor and the induc-
tor supply the power to the load until I TH exceeds 0.65V,
turning on the switch and the main control loop which
starts another cycle.
to be enabled if the pin is allowed to ?oat.
Dropout Operation
DUAL SWITCHING REGULATOR
The regulators use a current mode architecture with a
constant operating frequency of 2.25MHz. Both regulators
share the same clock and run in-phase. The output voltages
are ?xed at 1.8V for regulator 1 and at 1.575V for regulator
2. The resistive divider feedback networks are integrated
inside the LTC3552-1. An error ampli?er compares the
When the V CC input supply voltage decreases approach-
ing the output voltage, the duty cycle increases to 100%
which is the dropout condition. In dropout, the PMOS
switch is turned on continuously with the output voltage
being equal to the input voltage minus the voltage drops
across the internal P-channel MOSFET and the inductor.
An important design consideration is that the R DS(ON) of
35521fa
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