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参数资料
| 型号： | LTC3552EDHC-1#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 18/20页 |
| 文件大小： | 0K |
| 描述： | IC CHARGER BATT LI-ION 16-DFN |
| 标准包装： | 2,500 |
| 功能： | 充电管理 |
| 电池化学： | 锂离子（Li-Ion） |
| 电源电压： | 4.25 V ~ 8 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFDFN 裸露焊盘 |
| 供应商设备封装： | 16-DFN（5x3） |
| 包装： | 带卷 (TR) |
LTC3552-1
APPLICATIO S I FOR ATIO
other cases, where the voltage drop must be kept low, a
P-channel MOSFET can be used (as shown in Figure 4).
DRAIN-BULK
can be derived as 4.7μH, and output capacitor is 4.7μF.
Figure 2 shows the complete schematic for this design
example.
V IN
DIODE OF FET
LTC3552-1
V IN
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
35521 F04
Figure 4. Low Loss Input Reverse Polarity Protection
Design Example
As a design example, assume the LTC3552-1 is used in
a single lithium-ion battery-powered cellular phone ap-
plication.
Starting with the charger, choosing R PROG to be 1.24k
programs the charger for 806mA. A good rule of thumb
for I TERMINATE is one tenth the full charge current, so R ITERM
is picked to be 1.24k (I TERMINATE = 80mA).
For the switching regulators powered from the battery, V CC
can range from 4.2V to about 2.7V. The load requires a
maximum of 800mA in active mode and 2mA in standby
mode. Regulator 1 output voltage is 1.8V. Since the load
still needs power in standby, Burst Mode operation is used
for good low load ef?ciency. First, calculate the inductor
value for about 30% ripple current at maximum V CC :
the LTC3552-1. These items are also illustrated graphically
in the layout diagram of Figure 5. Check the following in
your layout:
1. Does the capacitor C IN connect to the power V CC and
GND (exposed pad) as closely as possible? This ca-
pacitor provides the AC current to the internal power
MOSFETs and their drivers.
2. The feedback signals V OUT should be routed away from
noisy components and traces, such as the SW line, and
its trace should be minimized.
3. Are the C OUT and L1 closely connected? The (–) plate of
C OUT returns current to GND and the (–) plate of C IN .
4. Keep sensitive components away from the SW pins.
The input capacitor C IN should be routed away from
the SW traces and the inductors.
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small
signal components returning to the GND pin at one
? ? 1 ? 4 . 2 V ? ? = 1 . 9 μ H
L =
1 . 8 V
2 . 25 MHz ? 240 mA
? 1 . 8 V ?
point and should not share the high current path of C IN
or C OUT .
Choosing a vendor’s closest inductor value of 2.2μH,
results in a maximum ripple current of:
6. Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. These copper areas should be connected
? ? 1 ? 4 . 2 V ? ? = 208 mA
? I L =
1 . 8 V
2 . 25 MHz ? 2 . 2 μ H
? 1 . 8 V ?
to V CC or GND.
LTC3552-1
V IN V CC
For cost reasons, a ceramic capacitor will be used. C OUT
selection is then based on load step droop instead of ESR
V OUT2
L2
SW2
SW1
L1
V OUT1
C OUT = 2 . 5
requirements. For a 5% output droop:
800 mA
2 . 25 MHz ? ( 5 % ? 2 . 5 V )
= 7 . 1 μ F
C FF2
C OUT2
C IN
V OUT2 V OUT1
V FB2 V FB1
GND
C S
C FF1
3552-1 F05
C OUT1
A good standard value is 10μF. Since the impedance of a
Li-Ion battery is very low, C IN is typically 10μF. Following
the same procedure, for V OUT2 = 1.575V, inductor value
BOLD LINES INDICATE
HIGH CURRENT PATHS
Figure 5. Layout Diagram
35521fa
18
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