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参数资料
| 型号： | LTC3554EPD#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | 0.6 A BATTERY CHARGE CONTROLLER, 2590 kHz SWITCHING FREQ-MAX, PQCC20 |
| 封装： | 3 X 3 MM, LEAD FREE, PLASTIC, UTQFN-20 |
| 文件页数： | 21/36页 |
| 文件大小： | 418K |
| 代理商： | LTC3554EPD#PBF |
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LTC3554/LTC3554-2
28
35542fb
typical) to keep the bucks enabled as described above.
PBSTAT does not go low on initial pushbutton application
for power-up, but will go low with subsequent ON pushbut-
ton applications in the PUP1, PUP2 or PON states.
Power-Up Via Applying External Power
Figure 8 shows the LTC3554 powering up through ap-
plication of external power (VBUS). For this example the
pushbutton circuitry starts in the POFF or HR state with a
battery connected and both bucks disabled. 100ms after
VBUS application the pushbutton circuitry transitions into
the PUP state and powers up buck1 followed by buck2.
The 100ms delay time allows the applied supply to settle.
The bucks will stay powered as long as their respective
PWR_ON inputs are driven high before the 5 second PUP
period is over. If either PWR_ON is low or goes low after
the 5 second period the corresponding buck(s) will be shut
down. In the above example both PWR_ONs are high at
OPERATION
the end of the 5 second period and therefore both bucks
continue to stay on at the end of the 5 second period.
PGOOD is asserted once all enabled bucks are within 8%
of their regulation voltage for 230ms.
The PWR_ON inputs can be driven via a μP/μC or one of
the buck outputs through a high impedance (100kΩ typ)
to keep the bucks enabled as described above.
Without a battery present, initial power application causes
a power-on reset which puts the pushbutton circuitry in
the PDN1 state and subsequently the HR state one second
later. At this time, if a valid supply voltage is detected
at the BUS pin (i.e., VBUS > VUVLO and VBUS – VBAT >
VDUVLO), the pushbutton circuity immediately enters the
PUP1 state. For this to work reliably, the BAT pin voltage
must be kept well-behaved when no battery is connected.
Ensure this by bypassing the BAT pin to GND with an RC
network consisting of a 100μF ceramic capacitor in series
with 0.3Ω.
BAT
VBUS
ON (PB)
PBSTAT
BUCK1
BUCK2
PGOOD
PWR_ON1
PWR_ON2
STATE
POFF/HR
PON
PUP2/PUP1
3554 TD02
5s
230ms
100ms
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Figure 8. Power-Up Via Applying External Power
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相关代理商/技术参数 |
参数描述 |
|---|---|
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