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参数资料
| 型号： | LTC3568IDD#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/18页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 1.8A 10DFN |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.5 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 最高 4MHz |
| 电流 - 输出： | 1.8A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 10-DFN（3x3） |
LTC3568
APPLICATIONS INFORMATION
the losses in LTC3568 circuits: 1) LTC3568 V IN current,
2) switching losses, 3) I 2 R losses, 4) other losses.
1. The V IN current is the DC supply current given in the
electrical characteristics which excludes MOSFET driver
and control currents. V IN current results in a small loss
that increases with V IN , even at no load.
2. The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from V IN to ground. The resulting dQ/dt is a current
out of V IN that is typically much larger than the DC bias
current. In continuous mode, I GATECHG = f O (QT + QB),
where QT and QB are the gate charges of the internal
top and bottom MOSFET switches. The gate charge
losses are proportional to V IN and thus their effects
will be more pronounced at higher supply voltages.
3. I 2 R Losses are calculated from the DC resistances of
the internal switches, R SW , and external inductor, RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the internal
top and bottom switches. Thus, the series resistance
looking into the SW pin is a function of both top and
bottom MOSFET R DS(ON) and the duty cycle (DC) as
follows:
R SW = (R DS(ON) TOP)(DC) + (R DS(ON) BOT)(1 – DC)
The R DS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I 2 R losses:
I 2 R losses = I OUT 2(R SW + RL)
4. Other “hidden” losses such as copper trace and internal
battery resistances can account for additional efficiency
degradations in portable systems. It is very important
to include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that C IN has adequate
charge storage and very low ESR at the switching fre-
quency. Other losses including diode conduction losses
during dead-time and inductor core losses generally
account for less than 2% total additional loss.
Thermal Considerations
In a majority of applications, the LTC3568 does not dis-
sipate much heat due to its high efficiency. However, in
applications where the LTC3568 is running at high ambient
temperature with low supply voltage and high duty cycles,
such as in dropout, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately 150°C, both power
switches will be turned off and the SW node will become
high impedance.
To avoid the LTC3568 from exceeding the maximum junc-
tion temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise is
given by:
T RISE = P D ? θ JA
where P D is the power dissipated by the regulator and θ JA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature, T J , is given by:
T J = T RISE + T AMBIENT
As an example, consider the case when the LTC3568 is in
dropout at an input voltage of 3.3V with a load current of
1.8A with a 70°C ambient temperature. From the Typical
Performance Characteristics graph of Switch Resistance,
the R DS(ON) resistance of the P-channel switch is 0.125 Ω .
Therefore, power dissipated by the part is:
P D = I 2 ? R DS(ON) = 405mW
The DFN package junction-to-ambient thermal resistance,
θ JA is 43°C/W. Therefore, the junction temperature of the
regulator operating in a 70°C ambient temperature is
approximately:
T J = 0.405 ? 43 + 70 = 87.4°C
Remembering that the above junction temperature is
obtained from an R DS(ON) at 70°C, we might recalculate
the junction temperature based on a higher R DS(ON) since
it increases with temperature. However, we can safely as-
sume that the actual junction temperature will not exceed
the absolute maximum junction temperature of 125°C.
3568fa
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