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参数资料
| 型号： | LTC3568IDD#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 3/18页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 1.8A 10DFN |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.5 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 最高 4MHz |
| 电流 - 输出： | 1.8A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 10-DFN（3x3） |
LTC3568
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T A = 25°C. V IN = 3.3V, R T = 324k unless otherwise specified. (Note 2)
f OSC
f SYNC
I LIM
R DS(ON)
I SW(LKG)
V UVLO
PGOOD
RPGOOD
Oscillator Frequency
Synchronization Frequency
Peak Switch Current Limit
Top Switch On-Resistance (Note 6)
Bottom Switch On-Resistance (Note 6)
Switch Leakage Current
Undervoltage Lockout Threshold
Power Good Threshold
Power Good Pull-Down On-Resistance
R T = 324k
(Note 7)
(Note 7)
I TH = 1.3
V IN = 3.3V
V IN = 3.3V
V IN = 6V, V ITH/RUN = 0V, V FB = 0V
V IN Ramping Down
V FB Ramping Up, SHDN/R T = 1V
V FB Ramping Down, SHDN/R T = 1V
0.85
0.4
2.4
1
3
0.11
0.11
0.01
2
6.8
–7.6
118
1.15
4
4
4
0.15
0.15
1
2.25
200
MHz
MHz
MHz
A
Ω
Ω
μA
V
%
%
Ω
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3568 is tested under pulsed load conditions such that T J =
T A . The LTC3568E is guaranteed to meet performance specifications from
0°C to 85°C. Specifications over the –40°C to 125°C operating junction
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3568I is guaranteed over the
full –40°C to 125°C operating junction temperature range. The maximum
ambient temperature is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistors and
other environmental factors.
Note 3: The LTC3568 is tested in a feedback loop which servos V FB to the
midpoint for the error amplifier (V ITH = 0.6V).
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5: T J is calculated from the ambient T A and power dissipation P D
according to the following formula:
T J = T A + (P D ? 43°C/W)
Note 6: Switch on-resistance is guaranteed by correlation to wafer level
measurements.
Note 7: 4MHz operation is guaranteed by design but not production tested
and is subject to duty cycle limitations (see Applications Information).
Note 8: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
3568fa
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