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参数资料
| 型号： | LTC3615EUF#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING REGULATOR, PQCC24 |
| 封装： | 4 X 4 MM, LEAD FREE, PLASTIC, MO-220WGGD, QFN-24 |
| 文件页数： | 4/32页 |
| 文件大小： | 585K |
| 代理商： | LTC3615EUF#PBF |
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LTC3615/LTC3615-1
12
3615fa
Figure 1. Mode Selection Voltage
OPERATION
Main Control Loop
The LTC3615 is a dual monolithic step-down DC/DC
converter featuring current-mode, constant-frequency
operation. Both channels are identical and share common
clock and reference circuits to improve channel-to-chan-
nel matching.
During normal operation, the internal top power switch
(P-channel MOSFET) of each channel is turned on at the
beginning of its clock cycle. Current in the inductor in-
creases until the current comparator trips and turns off the
top power MOSFET. The peak inductor current at which the
current comparator shuts off is controlled by the voltage
on the ITH pin. The error amplier adjusts the voltage on
the ITH pin by comparing the feedback signals derived
from an external resistor divider on the VFBx pin with an
internal 0.6V reference. When the load current increases,
it causes a reduction in the feedback voltage relative to
the reference. The error amplier raises the ITH voltage
until the average inductor current matches the new load
current. Typical voltage range for the ITH pin is from 0.45V
to 1.05V with 0.45V corresponding to zero current.
When the top power MOSFET shuts off, the synchronous
power switch (N-channel MOSFET) turns on until either
the current limit is reached or the next clock cycle begins.
The bottom current limit is typically set at –4A for forced
continuous mode and 0A for Burst Mode operation and
pulse-skipping mode.
The operating frequency defaults to 2.25MHz when
RT/SYNC is connected to SVIN, or can be set by an ex-
ternal resistor connected between the RT/SYNC pin and
ground, or by a clock signal applied to the RT/SYNC pin.
The switching frequency can be set from 400kHz to 4MHz
(see the Applications Information section).
Overvoltage and undervoltage comparators pull the PGOOD
output low if the output voltage varies more than ±7.5%
from the set point.
MODE SELECTION
The MODE pin is used to select one of four different
operating modes for both channels together (see Figures
1 and 3):
Burst Mode Operation—Internal Clamp
Connecting the MODE pin to the SGND pin enables Burst
Mode operation with its peak current set internally. In
Burst Mode operation the internal power MOSFETs operate
intermittently at light loads. This increases efciency by
minimizing switching losses. During the intervals when the
MOSFETs are not switching, the LTC3615 enters a sleep
state where many of the internal circuits are disabled to
save power. During Burst Mode operation, the ITH volt-
age is monitored by the burst comparator to determine
when the sleep state is entered or exited again. When the
average inductor current is greater than the load current,
the voltage on the ITH pin drops. As the ITH voltage falls
below the internal threshold, the LTC3615 enters the sleep
state. In the sleep state, the power MOSFETs are held
off and the load current is solely supplied by the output
capacitor. When the output voltage drops, the top power
MOSFET is switched back on and the internal circuits are
reenabled. This process repeats at a rate that is dependent
on the load current.
PS
PULSE-SKIPPING MODE ENABLE
FORCED CONTINUOUS MODE ENABLE
Burst Mode ENABLE—INTERNAL CLAMP
3615 F01
Burst Mode ENABLE—EXTERNAL CLAMP,
CONTROLLED BY VOLTAGE APPLIED AT
MODE PIN
SVIN
SVIN – 0.3V
SVIN 0.58
1.1V
0.8V
0.5V
0.3V
SGND
BM
EXT
FC
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