参数资料
型号: LTC3616EUDD#TRPBF
厂商: Linear Technology
文件页数: 23/28页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 6A 24QFN
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 5.5 V
输入电压: 2.25 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 300kHz ~ 4MHz
电流 - 输出: 6A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 24-QFN 裸露焊盘(3x5)
LTC3616
APPLICATIONS INFORMATION
3.82 11 Hz
R T = k – 16k = 130k Ω
C SS =
= 21.6nF
2M Ω ? In ?
? 5.5V – 0.6V ?
L = ?
? ? ? 1 –
? = 0.233μH
? I L = ?
? ? ? 1 –
? = 2.12A
I RMS = 6A ?
? ?
– 1 ? = 3A RMS
DesignExample
As a design example, consider using the LTC3616 in an
application with the following specifications:
V IN = 2.25V to 5.5V, V OUT = 1.8V, I OUT(MAX) = 6A, I OUT(MIN)
= 200mA, f = 2.6MHz.
Efficiency is important at both high and low load current,
so Burst Mode operation will be utilized.
First, calculate the timing resistor:
2.6MHz
Next, calculate the inductor value for about 30% ripple
current at maximum V IN :
? 1.8V ? ? 1.8V ?
? 2.6MHz ? 2A ? ? 5.5V ?
Using a standard value of 0.22μH inductor results in a
maximum ripple current of:
? 1.8V ? ? 1.8V ?
? 2.6MHz ? 0.22μH ? ? 5.5V ?
C OUT will be selected based on the ESR that is required
to satisfy the output voltage ripple requirement and the
bulk capacitance needed for loop stability. For this design,
a 150μF (or 47μF plus 100μF) ceramic capacitor is used
with a X5R or X7R dielectric.
Assuming worst-case conditions of V IN = 2V OUT , C IN should
be selected for a maximum current rating of:
1.8V ? 3.6V ?
3.6V ? 1.8V ?
Decoupling PV IN with four 22μF capacitors is adequate
for most applications.
If we set R2 = 196k, the value of R1 can now be determined
by solving the following equation.
Finally, define the soft start-up time choosing the proper
value for the capacitor and the resistor connected to
TRACK/SS. If we set minimum t SS = 5ms and a resistor
of 2M?, the following equation can be solved with the
maximum SV IN = 5.5V :
5ms
? 5.5V ?
?
The standard value of 22nF guarantees the minimum soft-
start up time of 5ms.
Figure 1 shows the schematic for this design example.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3616:
1. A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the SGND pin at one point which is then connected
to the PGND pin close to the LTC3616.
2. Connect the (+) terminal of the input capacitor(s), C IN ,
as close as possible to the PV IN pin, and the (–) terminal
as close as possible to the exposed pad, PGND. This
capacitor provides the AC current into the internal power
MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small-signal nodes.
4. Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
power components. Connect the copper areas to PGND
(exposed pad) for best performance.
5. Connect the V FB pin directly to the feedback resistors.
The resistor divider must be connected between V OUT
and SGND.
R1 = 196k ? ?
? 1 ?
? 1.8V
? 0.6V
?
?
A value of 392k will be selected for R1.
23
For more information www.linear.com/LTC3616
3616fb
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