参数资料
| 型号： | LTC3634IFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/28页 |
| 文件大小： | 0K |
| 描述： | IC CONV DDR DDR2 DDR3 28TSSOP |
| 标准包装： | 50 |
| 应用： | 转换器，DDR，DDR2，DDR3 |
| 输入电压： | 1.4 V ~ 15 V |
| 输出数： | 2 |
| 输出电压： | 0.6 V ~ 3 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.173"，4.40mm 宽）裸露焊盘 |
| 供应商设备封装： | 28-TSSOP 裸露焊盘 |
| 包装： | 管件 |
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LTC3634
OPERATION
The LTC3634 is a dual-channel, current mode monolithic
step-down regulator designed to provide high efficiency
power conversion for DDR memory supplies and bus ter-
mination. Its unique controlled on-time architecture allows
extremely low step-down ratios while maintaining a fast,
constant switching frequency. Each channel is enabled by
raising the voltage on the RUN pin above 1.22V nominally.
Main Control Loop
In normal operation, the internal top power MOSFET is
turned on for a fixed interval determined by a one-shot
timer (ON signal in the Block Diagram). When the top
power MOSFET turns off, the bottom power MOSFET turns
on until the current comparator I CMP trips, thus restarting
the one-shot timer and initiating the next cycle. Inductor
current is measured by sensing the voltage drop across
the bottom power MOSFET. The voltage on the ITH pin
sets the comparator threshold corresponding to induc-
tor valley current. The error amplifier EA adjusts this ITH
voltage by comparing the feedback signal V FB (derived
from the output voltage) to an internal 0.6V reference
voltage (channel 1) or the VTTR voltage (channel 2). If the
load current increases, it causes a drop in the feedback
voltage relative to the reference voltage. The ITH voltage
then rises until the average inductor current matches that
of the load current.
The switching frequency is determined by the value of the
R T resistor, which programs the current for the internal
oscillator. An internal phase-locked loop servos the one-
shot timer (ON signal) such that the internal oscillator
edge phase-locks to the SW node edge, thus forcing a
constant switching frequency. This unique controlled
on-time architecture also allows the switching frequency
to be synchronized to an external clock source when it
is applied to the MODE/SYNC pin. Channel 1 defaults to
forced continuous operation once the clock signal is applied
(channel 2 is always in forced continuous operation).
VTTR Output Buffer
The VTTR pin outputs a voltage equal to one half of
VDDQIN. It is capable of sourcing/sinking 10mA and driv-
ing capacitive loads up to 0.01μF. The error amplifier for
channel 2 uses this voltage as its reference voltage.
High Efficiency Burst Mode Operation
At light load currents, the inductor current can drop to zero
and become negative. In Burst Mode operation (available
only on channel 1), a current reversal comparator (I REV )
detects the negative inductor current and shuts off the
bottom power MOSFET, resulting in discontinuous opera-
tion and increased efficiency. Both power MOSFETs will
remain off until the ITH voltage rises above the zero current
level to initiate another cycle. During this time, the output
capacitor supplies the load current and the part is placed
into a low current sleep mode. Burst Mode operation is
disabled by tying the MODE/SYNC pin to ground, which
forces continuous synchronous operation regardless of
output load current.
Power Good Status Output
The PGOOD open-drain output will be pulled low if the
regulator output exits a ±8% window around the regulation
point. This threshold has 15mV of hysteresis relative to
the V FB pin. To prevent unwanted PGOOD glitches during
transients or dynamic V OUT changes, the LTC3634 PGOOD
falling edge includes a filter time of approximately 40μs.
For the V TT output (channel 2), VTTR is the regulation
point. The PGOOD2 pin will always be low when the VTTR
output voltage is less than 300mV.
V IN Overvoltage Protection
In order to protect the internal power MOSFET devices
against long transient voltage events, the LTC3634 con-
stantly monitors each V IN pin for an overvoltage condi-
tion. When V IN rises above 17.5V, the regulator suspends
operation by shutting off both power MOSFETs on the
corresponding channel. Once V IN drops below 16.5V, the
regulator immediately resumes normal operation. The
regulator does not execute its soft-start function when
exiting an overvoltage condition.
Out-Of-Phase Operation
Tying the PHMODE pin high sets the SW2 falling edge to
be 180° out-of-phase with the SW1 falling edge. There is
a significant advantage to running both channels out-of-
phase. When running the channels in phase, both topside
MOSFETs are on simultaneously, causing large current
3634fb
For more information www.linear.com/LTC3634
11
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| LTC3634IUFD#PBF | 功能描述:IC CONV DDR DDR2 DDR3 28QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| LTC3634IUFD#TRPBF | 功能描述:IC CONV DDR DDR2 DDR3 28QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| LTC3634MPFE#PBF | 制造商:Linear Technology 功能描述:IC CONV DDR DDR2 DDR3 28TSSOP 制造商:Linear Technology 功能描述:BUCK 15V 3A 500KHZ-4MHZ TS 制造商:Linear Technology 功能描述:BUCK, 15V, 3A, 500KHZ-4MHZ, TSSOP-28 制造商:Linear Technology 功能描述:DP-SWREG/Monolithic, 15V Dual 3A Monolithic Step Down Regulator for DDR Power |
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| LTC3634MPUFD#PBF | 制造商:Linear Technology 功能描述:IC CONV DDR DDR2 DDR3 28-QFN 制造商:Linear Technology 功能描述:BUCK 15V 3A 500KHZ-4MHZ QF |
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