参数资料
型号: LTC3703EGN-5#TR
厂商: Linear Technology
文件页数: 17/32页
文件大小: 0K
描述: IC REG CTRLR BST PWM VM 16-SSOP
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 330kHz
占空比: 96%
电源电压: 4.1 V ~ 15 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
LTC3703-5
APPLICATIO S I FOR ATIO
V IN
V IN
D2
ZHCS400
L2
4.7 μ H
+
1 μ F
Q1
R1
+
C10
1 μ F
10V
R17
37.4k
1%
SW
LT1613
V IN
C9
4.7 μ F
6.3V
+
C IN
R1
D1
5.1V
C IN
R17
12.1k
FB
GND
SHDN
LTC3703-5
V IN
TG
D1
5.1V
Q1
LTC3703-5
V IN
TG
1%
V OUT
V CC
SW
L1
5V TO
15V
V CC
SW
L1
V OUT
<5V
+
+
DRV CC
BG
C OUT
DRV CC
BG
C OUT
BGRTN
37035 F09a
Figure 9a. V CC Generated from 5V < V OUT < 15V
V IN
BGRTN
Figure 9b. V CC Generated from V OUT < 5V
V IN (<40V)
3703 F09b
+
+
1 μ F
OPTIONAL V CC
CONNECTION
C IN
R1
Q1
C IN
+
R1
Q1
5V < V SEC < 15V
D1
V CC
LTC3703-5
V IN
TG1
N
D1
5.1V
+
V SEC
1 μ F
LTC3703-5
V IN
TG
BAT85
5.1V
0.22 μ F
VN2222LL
BAT85
BAT85
DRV CC
SW
1
T1
V OUT
V CC
SW
L1
V OUT
R1
FCB
BG1
+
C OUT
DRV CC
BG
+
C OUT
R2
GND
BGRTN
BGRTN
3703 F09c
Figure 9c. Secondary Output Loop and V CC Connection
current to flow at full reverse voltage. If the reverse
current times reverse voltage exceeds the maximum
allowable power dissipation, the diode may be damaged.
For best results, use an ultrafast recovery diode such as
the MMDL770T1.
An internal undervoltage lockout (UVLO) monitors the
voltage on DRV CC to ensure that the LTC3703-5 has
sufficient gate drive voltage. If the DRV CC voltage falls
3703 F09d
Figure 9d. Capacitive Charge Pump for V CC (V IN < 40V)
below the UVLO threshold, the LTC3703-5 shuts down
and the gate drive outputs remain low.
Bottom MOSFET Source Supply (BGRTN)
The bottom gate driver, BG, switches from DRV CC to BGRTN
where BGRTN can be a voltage between ground and –5V.
Why not just keep it simple and always connect BGRTN to
ground? In high voltage switching converters, the switch
37035fa
17
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