参数资料
型号: LTC3703IGN-5#PBF
厂商: Linear Technology
文件页数: 23/32页
文件大小: 0K
描述: IC REG CTRLR BST PWM VM 16-SSOP
标准包装: 100
PWM 型: 电压模式
输出数: 1
频率 - 最大: 330kHz
占空比: 96%
电源电压: 4.1 V ~ 15 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 管件
LTC3703-5
APPLICATIO S I FOR ATIO
maximum junction temperature. The maximum inductor
current is a function of both duty cycle and maximum load
current, so the limit must be set for the maximum expected
duty cycle (minimum V IN ) in order to ensure that the
current limit does not kick in at loads < I O(MAX) :
GAIN
(dB)
A V
0
GAIN
–12dB/OCT
PHASE
(DEG)
0
V PROG =
I O ( MAX )
1 – D MAX
R DS ( ON ) ( 1 + δ )
PHASE
–90
= ?
? I O ( MAX ) ? R DS ( ON ) ( 1 + δ )
? V OUT ?
? V IN ( MIN ) ?
Once V PROG is determined, R IMAX is chosen as follows:
R IMAX = V PROG /12 μ A
Note that in a boost mode architecture, it is only possible
to provide protection for “soft” shorts where V OUT > V IN .
For hard shorts, the inductor current is limited only by the
input supply capability. Refer to Current Limit Program-
ming for buck mode for further considerations for current
limit programming.
Boost Converter: Feedback Loop/Compensation
Compensating a voltage mode boost converter is unfortu-
nately more difficult than for a buck converter. This is due
to an additional right-half plane (RHP) zero that is present
in the boost converter but not in a buck. The additional phase
lag resulting from the RHP zero is difficult if not impossible
to compensate even with a Type 3 loop, so the best approach
is usually to roll off the loop gain at a lower frequency than
what could be achievable in buck converter.
A typical gain/phase plot of a voltage-mode boost con-
verter is shown in Figure 16. The modulator gain and
phase can be measured as described for a buck converter
or can be estimated as follows:
GAIN (COMP-to-V OUT DC gain) = 20Log(V OUT2 /V IN )
–180
37035 F16
Figure 16. Transfer Function of Boost Modulator
quency so that the overall loop gain is 0dB here. The
compensation component to achieve this, using a Type 1
amplifier (see Figure 11), is:
G = 10 –GAIN/20
C1 = 1/(2 π ? f ? G ? R1)
Run/Soft-Start Function
The RUN/SS pin is a multipurpose pin that provide a soft-
start function and a means to shut down the LTC3703-5.
Soft-start reduces the input supply’s surge current by
gradually increasing the duty cycle and can also be used
for power supply sequencing.
Pulling RUN/SS below 1V puts the LTC3703-5 into a low
quiescent current shutdown (I Q ? 25 μ A). This pin can be
driven directly from logic as shown in Figure 17. Releasing
RUN/SS
2V/DIV
V OUT
5V/DIV
V IN 1
Dominant Pole: f P =
?
V OUT 2 π LC
I L
2A/DIV
Since significant phase shift begins at frequencies above
the dominant LC pole, choose a crossover frequency no
greater than about half this pole frequency. The gain of the
V IN = 50V
I LOAD = 2A
C SS = 0.01 μ F
2ms/DIV
37035 F17
compensation network should equal –GAIN at this fre-
Figure 17. LTC3703-5 Startup Operation
37035fa
23
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