参数资料
型号: LTC3722IGN-2#PBF
厂商: Linear Technology
文件页数: 19/28页
文件大小: 0K
描述: IC REG CTRLR DIV ISO PWM 24SSOP
标准包装: 55
PWM 型: 电压模式,全桥
输出数: 1
频率 - 最大: 1MHz
占空比: 98.5%
电源电压: 3.8 V ~ 10.3 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
包装: 管件
LTC3722-1/LTC3722-2
OPERATION
Current Sensing and Overcurrent Protection
Current sensing provides feedback for the current mode
control loop and protection from overload conditions. The
LTC3722-1/LTC3722-2 are compatible with either resis-
tive sensing or current transformer methods. Internally
connected to the LTC3722-1/LTC3722-2 CS pin are two
comparators that provide pulse-by-pulse and overcurrent
shutdown functions respectively (see Figure 10).
The pulse-by-pulse comparator has a 300mV nominal
threshold. If the 300mV threshold is exceeded, the PWM
cycle is terminated. The overcurrent comparator is set
approximately 2x higher than the pulse-by-pulse level.
If the current signal exceeds this level, the PWM cycle is
terminated, the soft-start capacitor is quickly discharged
and a soft-start cycle is initiated. If the overcurrent condition
persists, the LTC3722-1/LTC3722-2 halts PWM operation
and waits for the soft-start capacitor to charge up to ap-
proximately 4V before a retry is allowed. The soft-start
capacitor is charged by an internal 12μA current source.
If the fault condition has not cleared when soft-start
reaches 4V, the soft-start pin is again discharged and a
new cycle is initiated. This is referred to as hiccup mode
operation. In normal operation and under most abnormal
conditions, the pulse-by-pulse comparator is fast enough
to prevent hiccup mode operation. In severe cases, how-
ever, with high input voltage, very low R DS(ON) MOSFETs
and a shorted output, or with saturating magnetics, the
overcurrent comparator provides a means of protecting
the power converter.
Leading Edge Blanking
The LTC3722-1/LTC3722-2 provides programmable leading
edge blanking to prevent nuisance tripping of the current
sense circuitry. Leading edge blanking relieves the filter-
ing requirements for the CS pin, greatly improving the
response to real overcurrent conditions. It also allows
the use of a ground referenced current sense resistor
or transformer(s), further simplifying the design. With a
single 10k to 100k resistor from R LEB to GND, blanking
times of approximately 40ns to 320ns are programmed. If
not required, connecting R LEB to V REF can disable leading
edge blanking. Keep in mind that the use of leading edge
blanking will set a minimum linear control range for the
phase modulation circuitry.
Resistive Sensing
A resistor connected between input common and the
sources of MB and MD is the simplest method of current
sensing for the full bridge converter. This is the preferred
method for low to moderate power levels. The sense
resistor should be chosen such that the maximum rated
300mV
CS
PULSE BY PULSE
CURRENT LIMIT
BLANK + φ MOD
PWM
LATCH
Q
S
PWM
LOGIC
UVLO
ENABLE
S Q
R
H = SHUTDOWN
OUTPUTS
Q
R CS
OVERLOAD
CURRENT LIMIT
+
4.1V
12μA
650mV
UVLO
ENABLE
S Q
R
0.4V
SS
C SS
Q
372212 F10
Figure 10. Current Sense/Fault Circuitry Detail
372212fb
For more information www.linear.com/LTC3722
19
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