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参数资料
| 型号： | LTC3729LEUH-6#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 32-QFN |
| 标准包装： | 73 |
| 系列： | PolyPhase® |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 620kHz |
| 占空比： | 99.5% |
| 电源电压： | 4 V ~ 30 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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LTC3729L-6
APPLICATIO S I FOR ATIO
V OUT
V IN
=
k
N
where k = 1, 2, …, N – 1
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
So the number of phases used can be selected to minimize
the output ripple current and therefore the output ripple
voltage at the given input and output voltages. In applica-
tions having a highly varying input voltage, additional
phases will produce the best results.
Accepting larger values of ? I L allows the use of low
inductances, but can result in higher output voltage ripple.
A reasonable starting point for setting ripple current is ? I L
= 0.4(I OUT )/N, where N is the number of channels and I OUT
is the total load current. Remember, the maximum ? I L
occurs at the maximum input voltage. The individual
inductor ripple currents are constant determined by the
inductor, input and output voltages.
1.0
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manu-
facturer is Kool M μ . Toroids are very space efficient,
especially when you can use several layers of wire. Be-
cause they lack a bobbin, mounting is more difficult.
However, designs for surface mount are available which
do not increase the height significantly.
Power MOSFET, D1 and D2 Selection
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
Two external power MOSFETs must be selected for each
controller with the LTC3729L-6: One N-channel MOSFET
for the top (main) switch, and one N-channel MOSFET for
the bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV CC volt-
age. This voltage is typically 5V during start-up (see
EXTV CC Pin Connection). Consequently, logic-level thresh-
old MOSFETs must be used in most applications. The only
0
0.1
0.2
0.3 0.4
0.5 0.6 0.7
0.8
0.9
exception is if low input voltage is expected (V IN < 5V);
DUTY FACTOR (V OUT /V IN )
3729L-6 F03
Figure 3. Normalized Peak Output Current vs
Duty Factor [I RMS ≈ 0.3 ( ? I O(P–P) )]
Inductor Core Selection
Once the values for L1 and L2 are known, the type of
inductor must be selected. High efficiency converters
generally cannot afford the core loss found in low cost
powdered iron cores, forcing the use of more expensive
ferrite, molypermalloy, or Kool M μ ? cores. Actual core
loss is independent of core size for a fixed inductor value,
but it is very dependent on inductance selected. As induc-
tance increases, core losses go down. Unfortunately,
increased inductance requires more turns of wire and
therefore copper losses will increase.
Kool M μ is a registered trademark of Magnetics, Inc.
then, sublogic-level threshold MOSFETs (V GS(TH) < 3V)
should be used. Pay close attention to the BV DSS specifi-
cation for the MOSFETs as well; most of the logic-level
MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R DS(ON) , Miller capacitance C MILLER , input volt-
age and maximum output current. Miller capacitance,
C MILLER , can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. C MILLER is equal to the increase in gate charge along
the horizontal axis while the curve is approximately flat
divided by the specified change in V DS . This result is then
multiplied by the ratio of the application applied V DS to the
Gate charge curve specified V DS . When the IC is operating
in continuous mode the duty cycles for the top and bottom
MOSFETs are given by:
sn3729l6 3729l6fs
13
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