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| 型号： | LTC3729LEUH-6#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 14/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 32-QFN |
| 标准包装： | 73 |
| 系列： | PolyPhase® |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 620kHz |
| 占空比： | 99.5% |
| 电源电压： | 4 V ~ 30 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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LTC3729L-6
APPLICATIO S I FOR ATIO
Main Switch Duty Cycle =
V OUT
V IN
The Schottky diodes, D1 and D2 shown in Figure 1 conduct
during the dead-time between the conduction of the two
large power MOSFETs. This helps prevent the body diode
Synchronous Switch Duty Cycle = ? IN OUT ?
( I MAX DS ( ON ) +
) 2 ( 1 + δ ) R
P MAIN =
? V – V ?
? V IN ?
The MOSFET power dissipations at maximum output
current are given by:
V OUT
V IN
? ? 2 ? ?
( V IN ) 2 ? I MAX ? ( R DR )( C MILLER ) ?
of the bottom MOSFET from turning on, storing charge
during the dead-time, and requiring a reverse recovery
period which would reduce efficiency. A 1A to 3A (depend-
ing on output current) Schottky diode is generally a good
compromise for both regions of operation due to the
relatively small average current. Larger diodes result in
additional transition losses due to their larger junction
capacitance.
C IN and C OUT Selection
In continuous mode, the source current of each top
+
? 1 1 ?
? ?
? V INTVCC – V THMIN V THMIN ?
( f )
N-channel MOSFET is a square wave of duty cycle V OUT /
V IN . A low ESR input capacitor sized for the maximum
RMS current must be used. The details of a close form
equation can be found in Application Note 77. Figure 4
? I
?
V – V
P SYNC = IN OUT ? MAX ? ( 1 + δ ) R DS ( ON )
=
V IN
N
2
V IN ? N ?
where δ is the temperature dependency of R DS(ON) and
R DR (approximately 4 ? ) is the effective driver resistance
at the MOSFET’s Miller threshold voltage. V THMIN is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I 2 R losses but the topside N-channel
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V IN < 20V the
high current efficiency generally improves with larger
MOSFETs, while for V IN > 20V the transition losses rapidly
increase to the point that the use of a higher R DS(ON) device
with lower C MILLER actual provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
shows the input capacitor ripple current for different
phase configurations with the output voltage fixed and
input voltage varied. The input ripple current is normalized
against the DC output current. The graph can be used in
place of tedious calculations. The minimum input ripple
current can be achieved when the product of phase num-
ber and output voltage, N(V OUT ), is approximately equal to
the input voltage V IN or:
V OUT k
where k = 1, 2, …, N – 1
So the phase number can be chosen to minimize the input
capacitor size for the given input and output voltages.
In the graph of Figure 4, the local maximum input RMS
capacitor currents are reached when:
voltage when the top switch duty factor is low or during a
short-circuit when the synchronous switch is on close to
100% of the period.
V OUT
V IN
=
2 k ? 1
2 N
where k = 1, 2, …, N
The term (1 + δ ) is generally given for a MOSFET in the
form of a normalized R DS(ON) vs. Temperature curve, but
δ = 0.005/ ° C can be used as an approximation for low
voltage MOSFETs.
These worst-case conditions are commonly used for
design because even significant deviations do not offer
much relief. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
sn3729l6 3729l6fs
14
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