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| 型号： | LTC3735EUHF#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 17/32页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR DC/DC 2PH HI EFF 38-QFN |
| 标准包装： | 2,500 |
| 应用： | 控制器，Intel 移动式 CPU |
| 输出数： | 1 |
| 输出电压： | 0.7 V ~ 1.71 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 38-WFQFN 裸露焊盘 |
| 供应商设备封装： | 38-QFN（5x7） |
| 包装： | 带卷 (TR) |
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LTC3735
APPLICATIONS INFORMATION
= ( ) C SS
t DELAY =
1s/ μ F
C
C SS = ( 1s/ μ F ) C SS
t IRAMP =
R SS *
TopsideMOSFETDriverSupply(C B ,D B )(Referto
Functional Diagram)
External bootstrap capacitors C B1 and C B2 connected to the
BOOST1 and BOOST2 pins supply the gate drive voltages
for the topside MOSFETs. Capacitor C B in the Functional
Diagram is charged though diode D B from PV CC when the
SW pin is low. When the topside MOSFET turns on, the
driver places the C B voltage across the gate-source of the
desired MOSFET. This enhances the MOSFET and turns on
the topside switch. The switch node voltage, SW, rises to
V IN and the BOOST pin rises to V IN + PV CC . The value of
the boost capacitor C B needs to be 30 to 100 times that of
the total input capacitance of the topside MOSFET(s). The
reverse breakdown of D B must be greater than PV CC(MAX).
VID Output Voltage Programming
After 27μs ~ 71μs t BOOT delay, the output voltage of the
regulator is digitally programmed as defined in Table 2
using the VID0 to VID5 logic input pins. The VID logic
inputs program a precision, 0.25% internal feedback re-
sistive divider. The LTC3735 has an output voltage range
of 0.700V to 1.708V in 16mV steps.
Refering to the Functional Diagram, there is a resistor,
R VID , from V FB to ground. The value of R VID is controlled
by the six VID input pins. Another internal resistor, 5.33k
(R ATTEN ), completes the resistive divider. The output voltage
is thus set by the ratio of (R VID + 5.33k) to R VID .
An internal 1.5μA current source charges up the soft-start
capacitor, C SS . When the voltage on RUN/SS reaches 1.5V,
the controller is permitted to start operating. As the volt-
age on RUN/SS increases from 1.5V to 3.0V, the internal
current limit is increased from 25mV/R SENSE to 72mV/
R SENSE . The output current thus ramps up slowly, elimi-
nating the starting surge current required from the input
power supply. If RUN/SS has been pulled all the way to
ground there is a delay before starting of approximately:
1.5V
1.5 μ A SS
The time for the output current to ramp up is then:
3V ? 1.5V
1.5 μ A
By pulling the RUN/SS pin below 1V the LTC3735 is put
into low current shutdown (I Q < 100μA). The RUN/SS pin
can be driven directly from logic as shown in Figure 6.
Diode D1 in Figure 6 reduces the start delay but allows
C SS to ramp up slowly providing the soft-start function.
The RUN/SS pin has an internal 6V zener clamp (see
Functional Diagram).
PV CC
3.3V OR 5V RUN/SS RUN/SS
D1
C SS
C SS
Each VID digital pin is a high impedance input. There-
fore they must be actively pulled high or pulled low. The
logic low threshold of the VID pins is 0.3V; the logic high
threshold is 0.7V.
*OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF
Figure 6. RUN/SS Pin Interfacing
3735 F06
R2 ? ( R3 + R5 )
R5 ? ( R1 + R2 )
Soft-Start/RunFunction
The RUN/SS pin provides three functions: 1) run/shutdown,
2) soft-start and 3) an optional short-circuit latchoff timer.
Soft-start reduces the input power sources’ surge currents
by gradually increasing the controller’s current limit. The
latchoff timer prevents very short, extreme load transients
from tripping the overcurrent latch. A small pull-up cur-
rent (>5μA) supplied to the RUN/SS pin will prevent the
overcurrent latch from operating. The following paragraph
describes how the functions operate.
Start-Up Sequence (Refer to the Functional Diagram)
After soft-start, the output voltage of the regulator settles
at a voltage level equal to V BOOT .
V BOOT = 0.6V ?
By using different R5 resistors, V BOOT can be programmed.
3735fa
17
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