参数资料
型号: LTC3778EF#PBF
厂商: Linear Technology
文件页数: 17/24页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 20TSSOP
标准包装: 74
PWM 型: 电流模式
输出数: 1
电源电压: 4 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
包装: 管件
产品目录页面: 1336 (CN2011-ZH PDF)
LTC3778
APPLICATIO S I FOR ATIO
( 1 . 5 ) ( 0 . 010 ? ) ( )
+
5 . 1 A = 12 A
During this recovery time, V OUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. The I TH pin external components shown in Figure 7
will provide adequate compensation for most applica-
I LIMIT ≥
146 mV 1
2
tions. For a detailed explanation of switching control loop
and double check the assumed T J in the MOSFET:
( ) ( ) . 1 5 ( ) ? = 1 . 97 W
theory see Linear Technology Application Note 76.
Design Example
P BOT =
28 V – 2 . 5V
28 V
12 A 0 . 010
2
R ON =
= 400 k ?
( )( )
? = 2 . 3 μ H
(
)( )( )
?
( ) ( ) . 1 4 ( ) ? +
P TOP =
( )( ) ( )( )( )
As a design example, take a supply with the following
specifications: V IN = 7V to 28V (15V nominal), V OUT = 2.5V
± 5%, I OUT(MAX) = 10A, f = 250kHz. First, calculate the
timing resistor with V ON = V OUT :
1
250 kHz 10 pF
and choose the inductor for about 40% ripple current at
the maximum V IN :
2 . 5 V ? 2 . 5 V ?
L = 1 ?
250 kHz 0 . 4 10 A ? 28 V ?
Selecting a standard value of 1.8 μ H results in a maximum
ripple current of:
T J = 70 ° C + (1.97W)(40 ° C/W) = 149 ° C
Because the top MOSFET is on for such a short time, an
Si4884 R DS(ON)(MAX) = 0.0165 ? , C RSS = 100pF will be
sufficient. Checking its power dissipation at current limit
with ρ 100 ° C = 1.4:
2 .5V 2
12 A 0 . 0165
28 V
2
1 . 7 28 V 12 A 100 pF 250 kHz
= 0 . 30 W + 0 . 40 W = 0 . 7 W
T J = 70 ° C + (0.7W)(40 ° C/W) = 98 ° C
The junction temperatures will be significantly less at
nominal current, but this analysis shows that careful
attention to heat sinking will be necessary in this circuit.
) ( )
? 1 –
? = 5 . 1 A
? I L =
(
2 . 5 V ?
250 kHz 1 . 8 μ H ?
2 . 5 V ?
28 V ?
C IN is chosen for an RMS current rating of about 5A at
85 ° C. The output capacitors are chosen for a low ESR of
0.013 ? to minimize output voltage changes due to induc-
Next, choose the synchronous MOSFET switch. Choosing
a Si4874 (R DS(ON) = 0.0083 ? (NOM) 0.010 ? (MAX),
θ JA = 40 ° C/W) yields a nominal sense voltage of:
V SNS(NOM) = (10A)(1.3)(0.0083 ? ) = 108mV
Tying V RNG to 1.1V will set the current sense voltage range
for a nominal value of 110mV with current limit occurring
at 146mV. To check if the current limit is acceptable,
assume a junction temperature of about 80 ° C above a
70 ° C ambient with ρ 150 ° C = 1.5:
tor ripple current and load steps. The ripple voltage will be
only:
? V OUT(RIPPLE) = ? I L(MAX) (ESR)
= (5.1A) (0.013 ? ) = 66mV
However, a 0A to 10A load step will cause an output
change of up to:
? V OUT(STEP) = ? I LOAD (ESR) = (10A) (0.013 ? ) = 130mV
An optional 22 μ F ceramic output capacitor is included to
minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 7.
3778f
17
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